Module Name: src
Committed By: msaitoh
Date: Mon Nov 18 15:09:59 UTC 2019
Modified Files:
src/sys/dev/mii: ihphy.c
Log Message:
Remove extra 10ms delay in ihphy_reset(). The delay are in if_wm.c side.
It's required for hardware full reset and it't not requred on soft reset.
When ihphy.c was added in 9 years ago, some workaround code were not in
if_wm.c yet and the initialization code was not good.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/dev/mii/ihphy.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/mii/ihphy.c
diff -u src/sys/dev/mii/ihphy.c:1.14 src/sys/dev/mii/ihphy.c:1.15
--- src/sys/dev/mii/ihphy.c:1.14 Mon Mar 25 07:34:13 2019
+++ src/sys/dev/mii/ihphy.c Mon Nov 18 15:09:58 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: ihphy.c,v 1.14 2019/03/25 07:34:13 msaitoh Exp $ */
+/* $NetBSD: ihphy.c,v 1.15 2019/11/18 15:09:58 msaitoh Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
@@ -60,7 +60,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.14 2019/03/25 07:34:13 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ihphy.c,v 1.15 2019/11/18 15:09:58 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -291,14 +291,6 @@ ihphy_reset(struct mii_softc *sc)
PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_ISO);
- /*
- * Regarding reset, the data sheet specifies (page 55):
- *
- * "After PHY reset, a delay of 10 ms is required before
- * any register access using MDIO."
- */
- delay(10000);
-
/* Wait another 100ms for it to complete. */
for (i = 0; i < 100; i++) {
PHY_READ(sc, MII_BMCR, ®);
