Module Name: src
Committed By: jmcneill
Date: Sat Nov 23 12:30:45 UTC 2019
Modified Files:
src/sys/arch/arm/sunxi: sunxi_dwhdmi.c sunxi_hdmiphy.c sunxi_hdmiphy.h
Log Message:
HDMI PHY and TX share the same clocks. Do not enable clocks until both
reset resources have been deasserted. Explicitly set DDC clock dividers.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/sunxi/sunxi_dwhdmi.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/sunxi/sunxi_hdmiphy.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/sunxi/sunxi_hdmiphy.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_dwhdmi.c
diff -u src/sys/arch/arm/sunxi/sunxi_dwhdmi.c:1.5 src/sys/arch/arm/sunxi/sunxi_dwhdmi.c:1.6
--- src/sys/arch/arm/sunxi/sunxi_dwhdmi.c:1.5 Fri Nov 22 19:48:58 2019
+++ src/sys/arch/arm/sunxi/sunxi_dwhdmi.c Sat Nov 23 12:30:45 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_dwhdmi.c,v 1.5 2019/11/22 19:48:58 jmcneill Exp $ */
+/* $NetBSD: sunxi_dwhdmi.c,v 1.6 2019/11/23 12:30:45 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared D. McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_dwhdmi.c,v 1.5 2019/11/22 19:48:58 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_dwhdmi.c,v 1.6 2019/11/23 12:30:45 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -101,13 +101,6 @@ sunxi_dwhdmi_ep_activate(device_t dev, s
if (encoder == NULL)
return EINVAL;
- sc->sc_phy = fdtbus_phy_get(sc->sc_phandle, "hdmi-phy");
- if (sc->sc_phy == NULL) {
- device_printf(dev, "couldn't find hdmi-phy\n");
- return ENXIO;
- }
-
- sc->sc_regulator = fdtbus_regulator_acquire(sc->sc_phandle, "hvcc-supply");
if (sc->sc_regulator != NULL) {
error = fdtbus_regulator_enable(sc->sc_regulator);
if (error != 0) {
@@ -271,11 +264,25 @@ sunxi_dwhdmi_attach(device_t parent, dev
sc->sc_base.sc_enable = sunxi_dwhdmi_enable;
sc->sc_base.sc_disable = sunxi_dwhdmi_disable;
sc->sc_base.sc_mode_set = sunxi_dwhdmi_mode_set;
+ sc->sc_base.sc_scl_hcnt = 0xd8;
+ sc->sc_base.sc_scl_lcnt = 0xfe;
sc->sc_phandle = faa->faa_phandle;
aprint_naive("\n");
aprint_normal(": HDMI TX\n");
+ sc->sc_regulator = fdtbus_regulator_acquire(sc->sc_phandle, "hvcc-supply");
+
+ sc->sc_phy = fdtbus_phy_get(sc->sc_phandle, "hdmi-phy");
+ if (sc->sc_phy == NULL)
+ sc->sc_phy = fdtbus_phy_get(sc->sc_phandle, "phy");
+ if (sc->sc_phy == NULL) {
+ device_printf(self, "couldn't find PHY\n");
+ return;
+ }
+
+ sunxi_hdmiphy_init(sc->sc_phy);
+
if (dwhdmi_attach(&sc->sc_base) != 0) {
aprint_error_dev(self, "failed to attach driver\n");
return;
Index: src/sys/arch/arm/sunxi/sunxi_hdmiphy.c
diff -u src/sys/arch/arm/sunxi/sunxi_hdmiphy.c:1.2 src/sys/arch/arm/sunxi/sunxi_hdmiphy.c:1.3
--- src/sys/arch/arm/sunxi/sunxi_hdmiphy.c:1.2 Thu Jan 31 01:49:28 2019
+++ src/sys/arch/arm/sunxi/sunxi_hdmiphy.c Sat Nov 23 12:30:45 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_hdmiphy.c,v 1.2 2019/01/31 01:49:28 jmcneill Exp $ */
+/* $NetBSD: sunxi_hdmiphy.c,v 1.3 2019/11/23 12:30:45 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_hdmiphy.c,v 1.2 2019/01/31 01:49:28 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_hdmiphy.c,v 1.3 2019/11/23 12:30:45 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -128,6 +128,8 @@ struct sunxi_hdmiphy_softc {
const struct sunxi_hdmiphy_data *sc_data;
+ struct clk *sc_clk_bus;
+ struct clk *sc_clk_mod;
struct clk *sc_clk_pll0;
u_int sc_rcalib;
@@ -425,20 +427,10 @@ sunxi_hdmiphy_attach(device_t parent, de
}
clk_bus = fdtbus_clock_get(phandle, "bus");
- if (clk_bus == NULL || clk_enable(clk_bus) != 0) {
- aprint_error(": couldn't enable bus clock\n");
- return;
- }
-
clk_mod = fdtbus_clock_get(phandle, "mod");
- if (clk_mod == NULL || clk_enable(clk_mod) != 0) {
- aprint_error(": couldn't enable mod clock\n");
- return;
- }
-
clk_pll0 = fdtbus_clock_get(phandle, "pll-0");
- if (clk_pll0 == NULL || clk_enable(clk_pll0) != 0) {
- aprint_error(": couldn't enable pll-0 clock\n");
+ if (clk_bus == NULL || clk_mod == NULL || clk_pll0 == NULL) {
+ aprint_error(": couldn't get clocks\n");
return;
}
@@ -449,12 +441,25 @@ sunxi_hdmiphy_attach(device_t parent, de
aprint_error(": couldn't map registers\n");
return;
}
+ sc->sc_clk_bus = clk_bus;
+ sc->sc_clk_mod = clk_mod;
sc->sc_clk_pll0 = clk_pll0;
aprint_naive("\n");
aprint_normal(": HDMI PHY\n");
fdtbus_register_phy_controller(self, phandle, &sunxi_hdmiphy_funcs);
+}
+
+void
+sunxi_hdmiphy_init(struct fdtbus_phy *phy)
+{
+ device_t dev = fdtbus_phy_device(phy);
+ struct sunxi_hdmiphy_softc * const sc = device_private(dev);
+
+ clk_enable(sc->sc_clk_bus);
+ clk_enable(sc->sc_clk_mod);
+ clk_enable(sc->sc_clk_pll0);
PHY_WRITE(sc, READ_EN, READ_EN_MAGIC);
PHY_WRITE(sc, UNSCRAMBLE, UNSCRAMBLE_MAGIC);
Index: src/sys/arch/arm/sunxi/sunxi_hdmiphy.h
diff -u src/sys/arch/arm/sunxi/sunxi_hdmiphy.h:1.1 src/sys/arch/arm/sunxi/sunxi_hdmiphy.h:1.2
--- src/sys/arch/arm/sunxi/sunxi_hdmiphy.h:1.1 Wed Jan 30 01:24:00 2019
+++ src/sys/arch/arm/sunxi/sunxi_hdmiphy.h Sat Nov 23 12:30:45 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_hdmiphy.h,v 1.1 2019/01/30 01:24:00 jmcneill Exp $ */
+/* $NetBSD: sunxi_hdmiphy.h,v 1.2 2019/11/23 12:30:45 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca>
@@ -32,6 +32,7 @@
#include <drm/drmP.h>
#include <drm/drm_modes.h>
+void sunxi_hdmiphy_init(struct fdtbus_phy *);
int sunxi_hdmiphy_config(struct fdtbus_phy *, struct drm_display_mode *);
bool sunxi_hdmiphy_detect(struct fdtbus_phy *, bool);
