Module Name:    src
Committed By:   martin
Date:           Mon Nov 25 16:26:31 UTC 2019

Modified Files:
        src/sys/dev/mii [netbsd-9]: miidevs.h miidevs_data.h

Log Message:
Regen for ticket #473


To generate a diff of this commit:
cvs rdiff -u -r1.151.2.2 -r1.151.2.3 src/sys/dev/mii/miidevs.h
cvs rdiff -u -r1.139.2.2 -r1.139.2.3 src/sys/dev/mii/miidevs_data.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/mii/miidevs.h
diff -u src/sys/dev/mii/miidevs.h:1.151.2.2 src/sys/dev/mii/miidevs.h:1.151.2.3
--- src/sys/dev/mii/miidevs.h:1.151.2.2	Wed Oct 23 19:46:53 2019
+++ src/sys/dev/mii/miidevs.h	Mon Nov 25 16:26:31 2019
@@ -1,10 +1,10 @@
-/*	$NetBSD: miidevs.h,v 1.151.2.2 2019/10/23 19:46:53 martin Exp $	*/
+/*	$NetBSD: miidevs.h,v 1.151.2.3 2019/11/25 16:26:31 martin Exp $	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	NetBSD: miidevs,v 1.153.2.2 2019/10/23 19:45:56 martin Exp
+ *	NetBSD: miidevs,v 1.153.2.3 2019/11/25 16:26:00 martin Exp
  */
 
 /*-
@@ -72,7 +72,9 @@
 #define	MII_OUI_ENABLESEMI	0x0010dd	/* Enable Semiconductor */
 #define	MII_OUI_SUNPLUS	0x001105	/* Sunplus Technology */
 #define	MII_OUI_ATHEROS	0x001374	/* Atheros */
+#define	MII_OUI_TERANETICS	0x0014a6	/* Teranetics */
 #define	MII_OUI_RALINK2	0x0017a5	/* Ralink Technology */
+#define	MII_OUI_AQUANTIA	0x0017b6	/* Aquantia Corporation */
 #define	MII_OUI_BROADCOM3	0x001be9	/* Broadcom Corporation */
 #define	MII_OUI_LEVEL1	0x00207b	/* Level 1 */
 #define	MII_OUI_VIA	0x004063	/* VIA Technologies */
@@ -81,7 +83,6 @@
 #define	MII_OUI_AMLOGIC	0x006051	/* Amlogic */
 #define	MII_OUI_DAVICOM	0x00606e	/* Davicom Semiconductor */
 #define	MII_OUI_SMSC	0x00800f	/* SMSC */
-#define	MII_OUI_ICPLUS	0x0090c3	/* IC Plus Corp. */
 #define	MII_OUI_SEEQ	0x00a07d	/* Seeq */
 #define	MII_OUI_ICS	0x00a0be	/* Integrated Circuit Systems */
 #define	MII_OUI_INTEL	0x00aa00	/* Intel */
@@ -98,8 +99,9 @@
 #define	MII_OUI_NATSEMI	0x080017	/* National Semiconductor */
 #define	MII_OUI_TI	0x080028	/* Texas Instruments */
 #define	MII_OUI_BROADCOM4	0x18c086	/* Broadcom Corporation */
+#define	MII_OUI_RENESAS	0x749050	/* Renesas */
 
-/* Unregisterd or wrong OUI */
+/* Unregistered or wrong OUI */
 #define	MII_OUI_yyREALTEK	0x000004	/* Realtek */
 #define	MII_OUI_yyAMD	0x000058	/* Advanced Micro Devices */
 #define	MII_OUI_xxMYSON	0x00032d	/* Myson Technology */
@@ -111,6 +113,7 @@
 #define	MII_OUI_xxREALTEK	0x000732	/* Realtek */
 #define	MII_OUI_xxBROADCOM	0x000818	/* Broadcom Corporation */
 #define	MII_OUI_xxPMCSIERRA	0x0009c0	/* PMC-Sierra */
+#define	MII_OUI_xxICPLUS	0x0009c3	/* IC Plus Corp. */
 #define	MII_OUI_xxMARVELL	0x000ac2	/* Marvell Semiconductor */
 #define	MII_OUI_xxINTEL	0x001f00	/* Intel */
 #define	MII_OUI_xxBROADCOM_ALT1	0x0050ef	/* Broadcom Corporation */
@@ -343,14 +346,14 @@
 #define	MII_STR_xxDAVICOM_DM9601	"DM9601 internal 10/100 media interface"
 
 /* IC Plus Corp. PHYs */
-#define	MII_MODEL_ICPLUS_IP100	0x0004
-#define	MII_STR_ICPLUS_IP100	"IP100 10/100 PHY"
-#define	MII_MODEL_ICPLUS_IP101	0x0005
-#define	MII_STR_ICPLUS_IP101	"IP101 10/100 PHY"
-#define	MII_MODEL_ICPLUS_IP1000A	0x0008
-#define	MII_STR_ICPLUS_IP1000A	"IP1000A 10/100/1000 PHY"
-#define	MII_MODEL_ICPLUS_IP1001	0x0019
-#define	MII_STR_ICPLUS_IP1001	"IP1001 10/100/1000 PHY"
+#define	MII_MODEL_xxICPLUS_IP100	0x0004
+#define	MII_STR_xxICPLUS_IP100	"IP100 10/100 PHY"
+#define	MII_MODEL_xxICPLUS_IP101	0x0005
+#define	MII_STR_xxICPLUS_IP101	"IP101 10/100 PHY"
+#define	MII_MODEL_xxICPLUS_IP1000A	0x0008
+#define	MII_STR_xxICPLUS_IP1000A	"IP1000A 10/100/1000 PHY"
+#define	MII_MODEL_xxICPLUS_IP1001	0x0019
+#define	MII_STR_xxICPLUS_IP1001	"IP1001 10/100/1000 PHY"
 
 /* Integrated Circuit Systems PHYs */
 #define	MII_MODEL_ICS_1889	0x0001
@@ -408,10 +411,10 @@
 
 
 /* JMicron PHYs */
-#define	MII_MODEL_JMICRON_JMC250	0x0021
-#define	MII_STR_JMICRON_JMC250	"JMC250 10/100/1000 media interface"
-#define	MII_MODEL_JMICRON_JMC260	0x0022
-#define	MII_STR_JMICRON_JMC260	"JMC260 10/100 media interface"
+#define	MII_MODEL_JMICRON_JMP211	0x0021
+#define	MII_STR_JMICRON_JMP211	"JMP211 10/100/1000 media interface"
+#define	MII_MODEL_JMICRON_JMP202	0x0022
+#define	MII_STR_JMICRON_JMP202	"JMP202 10/100 media interface"
 
 /* Level 1 PHYs */
 #define	MII_MODEL_xxLEVEL1_LXT970	0x0000

Index: src/sys/dev/mii/miidevs_data.h
diff -u src/sys/dev/mii/miidevs_data.h:1.139.2.2 src/sys/dev/mii/miidevs_data.h:1.139.2.3
--- src/sys/dev/mii/miidevs_data.h:1.139.2.2	Wed Oct 23 19:46:53 2019
+++ src/sys/dev/mii/miidevs_data.h	Mon Nov 25 16:26:31 2019
@@ -1,10 +1,10 @@
-/*	$NetBSD: miidevs_data.h,v 1.139.2.2 2019/10/23 19:46:53 martin Exp $	*/
+/*	$NetBSD: miidevs_data.h,v 1.139.2.3 2019/11/25 16:26:31 martin Exp $	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	NetBSD: miidevs,v 1.153.2.2 2019/10/23 19:45:56 martin Exp
+ *	NetBSD: miidevs,v 1.153.2.3 2019/11/25 16:26:00 martin Exp
  */
 
 /*-
@@ -136,10 +136,10 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161A, MII_STR_xxDAVICOM_DM9161A },
  { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9161B, MII_STR_xxDAVICOM_DM9161B },
  { MII_OUI_xxDAVICOM, MII_MODEL_xxDAVICOM_DM9601, MII_STR_xxDAVICOM_DM9601 },
- { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP100, MII_STR_ICPLUS_IP100 },
- { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101, MII_STR_ICPLUS_IP101 },
- { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP1000A, MII_STR_ICPLUS_IP1000A },
- { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP1001, MII_STR_ICPLUS_IP1001 },
+ { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP100, MII_STR_xxICPLUS_IP100 },
+ { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP101, MII_STR_xxICPLUS_IP101 },
+ { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP1000A, MII_STR_xxICPLUS_IP1000A },
+ { MII_OUI_xxICPLUS, MII_MODEL_xxICPLUS_IP1001, MII_STR_xxICPLUS_IP1001 },
  { MII_OUI_ICS, MII_MODEL_ICS_1889, MII_STR_ICS_1889 },
  { MII_OUI_ICS, MII_MODEL_ICS_1890, MII_STR_ICS_1890 },
  { MII_OUI_ICS, MII_MODEL_ICS_1892, MII_STR_ICS_1892 },
@@ -165,8 +165,8 @@ struct mii_knowndev mii_knowndevs[] = {
  { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_I210, MII_STR_xxMARVELL_I210 },
  { MII_OUI_xxMARVELL, MII_MODEL_xxMARVELL_I82563, MII_STR_xxMARVELL_I82563 },
  { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_I82578, MII_STR_ATTANSIC_I82578 },
- { MII_OUI_JMICRON, MII_MODEL_JMICRON_JMC250, MII_STR_JMICRON_JMC250 },
- { MII_OUI_JMICRON, MII_MODEL_JMICRON_JMC260, MII_STR_JMICRON_JMC260 },
+ { MII_OUI_JMICRON, MII_MODEL_JMICRON_JMP211, MII_STR_JMICRON_JMP211 },
+ { MII_OUI_JMICRON, MII_MODEL_JMICRON_JMP202, MII_STR_JMICRON_JMP202 },
  { MII_OUI_xxLEVEL1, MII_MODEL_xxLEVEL1_LXT970, MII_STR_xxLEVEL1_LXT970 },
  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT1000_OLD, MII_STR_LEVEL1_LXT1000_OLD },
  { MII_OUI_LEVEL1, MII_MODEL_LEVEL1_LXT974, MII_STR_LEVEL1_LXT974 },

Reply via email to