Module Name: src
Committed By: jmcneill
Date: Mon Aug 30 22:28:50 UTC 2021
Modified Files:
src/sys/arch/aarch64/aarch64: idle_machdep.S
Log Message:
Ensure that all memory accesses prior to executing WFI have been completed
by adding a DSB SY before stopping execution and entering a low power
state. From the ARM Cortex-A Series Programmer's Guide for ARMv8-A:
"ARM recommends the use of a Data Synchronization Barrier (DSB) instruction
before WFI or WFE, to ensure that pending memory transactions complete before
changing state."
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/aarch64/aarch64/idle_machdep.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/idle_machdep.S
diff -u src/sys/arch/aarch64/aarch64/idle_machdep.S:1.9 src/sys/arch/aarch64/aarch64/idle_machdep.S:1.10
--- src/sys/arch/aarch64/aarch64/idle_machdep.S:1.9 Tue Feb 23 14:50:33 2021
+++ src/sys/arch/aarch64/aarch64/idle_machdep.S Mon Aug 30 22:28:50 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: idle_machdep.S,v 1.9 2021/02/23 14:50:33 ryo Exp $ */
+/* $NetBSD: idle_machdep.S,v 1.10 2021/08/30 22:28:50 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
#include <aarch64/locore.h>
#include "assym.h"
-RCSID("$NetBSD: idle_machdep.S,v 1.9 2021/02/23 14:50:33 ryo Exp $");
+RCSID("$NetBSD: idle_machdep.S,v 1.10 2021/08/30 22:28:50 jmcneill Exp $");
#ifdef ARM_INTR_IMPL
#include ARM_INTR_IMPL
@@ -55,6 +55,7 @@ ENTRY(cpu_idle)
/*
* hardware interrupt -> trap handler -> interrupt handler
*/
+ dsb sy
wfi
#else /* LAZY_CPUIDLE */
@@ -93,6 +94,7 @@ ENTRY(cpu_idle)
*/
str w2, [x28, #CI_INTR_DEPTH] /* ci->ci_intr_depth = 1 */
+ dsb sy
wfi
bl ARM_IRQ_HANDLER /* irqhandler(trapframe) */
1:
