Module Name:    src
Committed By:   martin
Date:           Sun Sep  5 10:48:48 UTC 2021

Modified Files:
        src/sys/arch/mips/mips [netbsd-9]: trap.c

Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1342):

        sys/arch/mips/mips/trap.c: revision 1.250
        sys/arch/mips/mips/trap.c: revision 1.251

Add missing newline to a diagnostic printf.

Comment out the diagnostic message in the TLB_MOD handler that's logged if
pmap_tlb_update_addr() indicates that the VA+ASID was not found in the TLB.

It's a harmless race condition that can happen for legitimate reasons (e.g.
a TLB miss in an interrupt handler that evicts the entry from the TLB).

See discussion:
    http://mail-index.netbsd.org/port-mips/2020/03/07/msg000927.html


To generate a diff of this commit:
cvs rdiff -u -r1.249 -r1.249.4.1 src/sys/arch/mips/mips/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/mips/trap.c
diff -u src/sys/arch/mips/mips/trap.c:1.249 src/sys/arch/mips/mips/trap.c:1.249.4.1
--- src/sys/arch/mips/mips/trap.c:1.249	Sat Apr  6 11:54:20 2019
+++ src/sys/arch/mips/mips/trap.c	Sun Sep  5 10:48:48 2021
@@ -1,4 +1,4 @@
-/*	$NetBSD: trap.c,v 1.249 2019/04/06 11:54:20 kamil Exp $	*/
+/*	$NetBSD: trap.c,v 1.249.4.1 2021/09/05 10:48:48 martin Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.249 2019/04/06 11:54:20 kamil Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.249.4.1 2021/09/05 10:48:48 martin Exp $");
 
 #include "opt_cputype.h"	/* which mips CPU levels do we support? */
 #include "opt_ddb.h"
@@ -296,10 +296,20 @@ trap(uint32_t status, uint32_t cause, va
 		vaddr = trunc_page(vaddr);
 		int ok = pmap_tlb_update_addr(pmap, vaddr, pte, 0);
 		kpreempt_enable();
-		if (ok != 1)
+		if (ok != 1) {
+#if 0 /* PMAP_FAULTINFO? */
+			/*
+			 * Since we don't block interrupts here,
+			 * this can legitimately happen if we get
+			 * a TLB miss that's serviced in an interrupt
+			 * hander that happens to randomly evict the
+			 * TLB entry we're concerned about.
+			 */
 			printf("pmap_tlb_update_addr(%p,%#"
-			    PRIxVADDR",%#"PRIxPTE", 0) returned %d",
+			    PRIxVADDR",%#"PRIxPTE", 0) returned %d\n",
 			    pmap, vaddr, pte_value(pte), ok);
+#endif
+		}
 		paddr_t pa = pte_to_paddr(pte);
 		KASSERTMSG(uvm_pageismanaged(pa),
 		    "%#"PRIxVADDR" pa %#"PRIxPADDR, vaddr, pa);

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