Module Name: src
Committed By: jmcneill
Date: Sat Nov 13 01:07:09 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk3288_cru.c
Log Message:
Fix width of aclk_cpu_pre divider field
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/rockchip/rk3288_cru.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3288_cru.c
diff -u src/sys/arch/arm/rockchip/rk3288_cru.c:1.2 src/sys/arch/arm/rockchip/rk3288_cru.c:1.3
--- src/sys/arch/arm/rockchip/rk3288_cru.c:1.2 Sat Nov 13 00:34:07 2021
+++ src/sys/arch/arm/rockchip/rk3288_cru.c Sat Nov 13 01:07:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3288_cru.c,v 1.2 2021/11/13 00:34:07 jmcneill Exp $ */
+/* $NetBSD: rk3288_cru.c,v 1.3 2021/11/13 01:07:09 jmcneill Exp $ */
/*-
* Copyright (c) 2021 Jared McNeill <[email protected]>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: rk3288_cru.c,v 1.2 2021/11/13 00:34:07 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3288_cru.c,v 1.3 2021/11/13 01:07:09 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -240,7 +240,7 @@ static struct rk_cru_clk rk3288_cru_clks
__BIT(4), /* gate_mask */
0),
- RK_DIV(0, "aclk_cpu_pre", "aclk_cpu_src", CLKSEL_CON(1), __BITS(3,0), 0),
+ RK_DIV(0, "aclk_cpu_pre", "aclk_cpu_src", CLKSEL_CON(1), __BITS(2,0), 0),
RK_DIV(0, "clk_24m", "xin24m", CLKSEL_CON(2), __BITS(12,8), 0),
RK_DIV(0, "pclk_pd_alive", "gpll", CLKSEL_CON(33), __BITS(12,8), 0),
