Module Name: src
Committed By: jdc
Date: Wed Nov 17 11:57:27 UTC 2021
Modified Files:
src/sys/arch/arm/amlogic: meson_dwmac.c
Log Message:
PR port-evbarm/50416
Also check the "reset_gpios", "reset-assert-us", and "reset-deassert-us"
properties for ethernet MAC reset information. Makes the built-in ethernet
work on Odroid C1 and Odroid C2 (with mesongxbb_pinctrl.c >= r1.3).
Based on a hint from Jared. C2 tested by Martin.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/amlogic/meson_dwmac.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/amlogic/meson_dwmac.c
diff -u src/sys/arch/arm/amlogic/meson_dwmac.c:1.12 src/sys/arch/arm/amlogic/meson_dwmac.c:1.13
--- src/sys/arch/arm/amlogic/meson_dwmac.c:1.12 Sun Nov 7 19:21:32 2021
+++ src/sys/arch/arm/amlogic/meson_dwmac.c Wed Nov 17 11:57:27 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: meson_dwmac.c,v 1.12 2021/11/07 19:21:32 jmcneill Exp $ */
+/* $NetBSD: meson_dwmac.c,v 1.13 2021/11/17 11:57:27 jdc Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: meson_dwmac.c,v 1.12 2021/11/07 19:21:32 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: meson_dwmac.c,v 1.13 2021/11/17 11:57:27 jdc Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -70,29 +70,68 @@ meson_dwmac_reset(const int phandle)
{
struct fdtbus_gpio_pin *pin_reset;
const u_int *reset_delay_us;
+ const u_int *reset_assert_us, *reset_deassert_us, *reset_gpios;
bool reset_active_low;
int len, val;
- pin_reset = fdtbus_gpio_acquire(phandle, "snps,reset-gpio", GPIO_PIN_OUTPUT);
- if (pin_reset == NULL)
+ /*
+ * Depending on the DTS, we need to check either the "snps,...",
+ * or the "reset-..." properties for the MAC reset information.
+ */
+
+ pin_reset = fdtbus_gpio_acquire(phandle, "snps,reset-gpio",
+ GPIO_PIN_OUTPUT);
+ if (pin_reset != NULL) {
+
+ reset_delay_us = fdtbus_get_prop(phandle,
+ "snps,reset-delays-us", &len);
+ if (reset_delay_us == NULL || len != 12)
+ return ENXIO;
+
+ reset_active_low = of_hasprop(phandle, "snps,reset-active-low");
+
+ val = reset_active_low ? 1 : 0;
+
+ fdtbus_gpio_write(pin_reset, val);
+ delay(be32toh(reset_delay_us[0]));
+ fdtbus_gpio_write(pin_reset, !val);
+ delay(be32toh(reset_delay_us[1]));
+ fdtbus_gpio_write(pin_reset, val);
+ delay(be32toh(reset_delay_us[2]));
+
return 0;
+ }
+
+ pin_reset = fdtbus_gpio_acquire(phandle, "reset-gpios",
+ GPIO_PIN_OUTPUT);
+ if (pin_reset != NULL) {
+ reset_assert_us = fdtbus_get_prop(phandle,
+ "reset-assert-us", &len);
+ if (reset_assert_us == NULL || len != 4)
+ return ENXIO;
+ reset_deassert_us = fdtbus_get_prop(phandle,
+ "reset-deassert-us", &len);
+ if (reset_deassert_us == NULL || len != 4)
+ return ENXIO;
+ reset_gpios = fdtbus_get_prop(phandle,
+ "reset-gpios", &len);
+ if (reset_gpios == NULL || len != 12)
+ return ENXIO;
+
+ reset_active_low = be32toh(reset_gpios[2]);
+
+ val = reset_active_low ? 1 : 0;
+
+
+ fdtbus_gpio_write(pin_reset, val);
+ delay(be32toh(reset_assert_us[0]));
+ fdtbus_gpio_write(pin_reset, !val);
+ delay(be32toh(reset_deassert_us[0]));
- reset_delay_us = fdtbus_get_prop(phandle, "snps,reset-delays-us", &len);
- if (reset_delay_us == NULL || len != 12)
- return ENXIO;
-
- reset_active_low = of_hasprop(phandle, "snps,reset-active-low");
-
- val = reset_active_low ? 1 : 0;
-
- fdtbus_gpio_write(pin_reset, val);
- delay(be32toh(reset_delay_us[0]));
- fdtbus_gpio_write(pin_reset, !val);
- delay(be32toh(reset_delay_us[1]));
- fdtbus_gpio_write(pin_reset, val);
- delay(be32toh(reset_delay_us[2]));
+ return 0;
+ }
- return 0;
+ return ENXIO;
}
static void
