Module Name: src
Committed By: msaitoh
Date: Sun Dec 5 02:41:44 UTC 2021
Modified Files:
src/sys/dev/marvell: mvcesa.c mvcesareg.h
Log Message:
s/decript/decrypt/ in comment.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/dev/marvell/mvcesa.c
cvs rdiff -u -r1.2 -r1.3 src/sys/dev/marvell/mvcesareg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/marvell/mvcesa.c
diff -u src/sys/dev/marvell/mvcesa.c:1.3 src/sys/dev/marvell/mvcesa.c:1.4
--- src/sys/dev/marvell/mvcesa.c:1.3 Sun Jun 14 23:29:23 2020
+++ src/sys/dev/marvell/mvcesa.c Sun Dec 5 02:41:44 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: mvcesa.c,v 1.3 2020/06/14 23:29:23 riastradh Exp $ */
+/* $NetBSD: mvcesa.c,v 1.4 2021/12/05 02:41:44 msaitoh Exp $ */
/*
* Copyright (c) 2008 KIYOHARA Takashi
* All rights reserved.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvcesa.c,v 1.3 2020/06/14 23:29:23 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvcesa.c,v 1.4 2021/12/05 02:41:44 msaitoh Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -716,7 +716,7 @@ mvcesa_des_encdec(struct mvcesa_softc *s
}
/*
- * Encryption/Decription calculation time is 9 cycles in DES
+ * Encryption/Decryption calculation time is 9 cycles in DES
* mode and 25 cycles in 3DES mode.
*/
bus_space_write_4(sc->sc_iot, sc->sc_ioh, MVCESA_DESE_DBL,
Index: src/sys/dev/marvell/mvcesareg.h
diff -u src/sys/dev/marvell/mvcesareg.h:1.2 src/sys/dev/marvell/mvcesareg.h:1.3
--- src/sys/dev/marvell/mvcesareg.h:1.2 Sat Sep 28 05:46:51 2013
+++ src/sys/dev/marvell/mvcesareg.h Sun Dec 5 02:41:44 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: mvcesareg.h,v 1.2 2013/09/28 05:46:51 kiyohara Exp $ */
+/* $NetBSD: mvcesareg.h,v 1.3 2021/12/05 02:41:44 msaitoh Exp $ */
/*
* Copyright (c) 2008 KIYOHARA Takashi
* All rights reserved.
@@ -80,7 +80,7 @@
#define MVCESA_SHA1MD5I_AC_IVBYTESWAP (1 << 4)
#define MVCESA_SHA1MD5I_AC_TERMINATION (1 << 31)
-/* AES Encryption/Decription Interface Registers */
+/* AES Encryption/Decryption Interface Registers */
#define MVCESA_AES_ENCRYPTION 0xd80
#define MVCESA_AES_DECRYPTION 0xdc0
#define MVCESA_AES_DIOC_OFF 0x20 /* Data In/Out Column */
