Module Name: src
Committed By: riastradh
Date: Sun Dec 19 12:37:54 UTC 2021
Modified Files:
src/sys/external/bsd/drm2/dist/drm/amd/powerplay: amdgpu_renoir_ppt.c
amdgpu_smu.c
src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr:
amdgpu_smu10_hwmgr.c amdgpu_smu7_hwmgr.c amdgpu_smu8_hwmgr.c
amdgpu_vega10_hwmgr.c amdgpu_vega12_hwmgr.c
Log Message:
amdgpu: Reduce unhelpful sprintf diffs.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 \
src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_renoir_ppt.c
cvs rdiff -u -r1.4 -r1.5 \
src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_smu.c
cvs rdiff -u -r1.3 -r1.4 \
src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu10_hwmgr.c
\
src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu7_hwmgr.c \
src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu8_hwmgr.c \
src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega10_hwmgr.c \
src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega12_hwmgr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_renoir_ppt.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_renoir_ppt.c:1.3 src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_renoir_ppt.c:1.4
--- src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_renoir_ppt.c:1.3 Sun Dec 19 12:21:10 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_renoir_ppt.c Sun Dec 19 12:37:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: amdgpu_renoir_ppt.c,v 1.3 2021/12/19 12:21:10 riastradh Exp $ */
+/* $NetBSD: amdgpu_renoir_ppt.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $ */
/*
* Copyright 2019 Advanced Micro Devices, Inc.
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_renoir_ppt.c,v 1.3 2021/12/19 12:21:10 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_renoir_ppt.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $");
#include "amdgpu.h"
#include "amdgpu_smu.h"
@@ -35,6 +35,8 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_renoi
#include "smu_v12_0.h"
#include "renoir_ppt.h"
+#include <linux/nbsd-namespace.h>
+
#define CLK_MAP(clk, index) \
[SMU_##clk] = {1, (index)}
@@ -270,12 +272,12 @@ static int renoir_print_clk_levels(struc
else
i = 1;
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "0: %uMhz %s\n", min,
+ size += sprintf(buf + size, "0: %uMhz %s\n", min,
i == 0 ? "*" : "");
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "1: %uMhz %s\n",
+ size += sprintf(buf + size, "1: %uMhz %s\n",
i == 1 ? cur_value : RENOIR_UMD_PSTATE_GFXCLK,
i == 1 ? "*" : "");
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "2: %uMhz %s\n", max,
+ size += sprintf(buf + size, "2: %uMhz %s\n", max,
i == 2 ? "*" : "");
}
return size;
@@ -301,7 +303,7 @@ static int renoir_print_clk_levels(struc
for (i = 0; i < count; i++) {
GET_DPM_CUR_FREQ(clk_table, clk_type, i, value);
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n", i, value,
+ size += sprintf(buf + size, "%d: %uMhz %s\n", i, value,
cur_value == value ? "*" : "");
}
@@ -851,7 +853,7 @@ static int renoir_get_power_profile_mode
if (workload_type < 0)
continue;
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%2d %14s%s\n",
+ size += sprintf(buf + size, "%2d %14s%s\n",
i, profile_name[i], (i == smu->power_profile_mode) ? "*" : " ");
}
Index: src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_smu.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_smu.c:1.4 src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_smu.c:1.5
--- src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_smu.c:1.4 Sun Dec 19 12:31:45 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/powerplay/amdgpu_smu.c Sun Dec 19 12:37:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: amdgpu_smu.c,v 1.4 2021/12/19 12:31:45 riastradh Exp $ */
+/* $NetBSD: amdgpu_smu.c,v 1.5 2021/12/19 12:37:54 riastradh Exp $ */
/*
* Copyright 2019 Advanced Micro Devices, Inc.
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_smu.c,v 1.4 2021/12/19 12:31:45 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_smu.c,v 1.5 2021/12/19 12:37:54 riastradh Exp $");
#include <linux/firmware.h>
#include <linux/pci.h>
@@ -86,7 +86,7 @@ size_t smu_sys_get_pp_feature_mask(struc
if (ret)
goto failed;
- size = snprintf(buf + size, SIZE_MAX/*XXX*/, "features high: 0x%08x low: 0x%08x\n",
+ size = sprintf(buf + size, "features high: 0x%08x low: 0x%08x\n",
feature_mask[1], feature_mask[0]);
for (i = 0; i < SMU_FEATURE_COUNT; i++) {
@@ -98,7 +98,7 @@ size_t smu_sys_get_pp_feature_mask(struc
}
for (i = 0; i < hw_feature_count; i++) {
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%02d. %-20s (%2d) : %s\n",
+ size += sprintf(buf + size, "%02d. %-20s (%2d) : %s\n",
count++,
smu_get_feature_name(smu, sort_feature[i]),
i,
Index: src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu10_hwmgr.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu10_hwmgr.c:1.3 src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu10_hwmgr.c:1.4
--- src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu10_hwmgr.c:1.3 Sun Dec 19 12:21:29 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu10_hwmgr.c Sun Dec 19 12:37:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: amdgpu_smu10_hwmgr.c,v 1.3 2021/12/19 12:21:29 riastradh Exp $ */
+/* $NetBSD: amdgpu_smu10_hwmgr.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $ */
/*
* Copyright 2015 Advanced Micro Devices, Inc.
@@ -23,7 +23,7 @@
*
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_smu10_hwmgr.c,v 1.3 2021/12/19 12:21:29 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_smu10_hwmgr.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $");
#include "pp_debug.h"
#include <linux/types.h>
@@ -42,6 +42,8 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_smu10
#include "soc15_common.h"
#include "smu10.h"
+#include <linux/nbsd-namespace.h>
+
#define SMU10_MAX_DEEPSLEEP_DIVIDER_ID 5
#define SMU10_MINIMUM_ENGINE_CLOCK 800 /* 8Mhz, the low boundary of engine clock allowed on this chip */
#define SCLK_MIN_DIV_INTV_SHIFT 12
@@ -904,13 +906,13 @@ static int smu10_print_clock_levels(stru
else
i = 1;
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "0: %uMhz %s\n",
+ size += sprintf(buf + size, "0: %uMhz %s\n",
data->gfx_min_freq_limit/100,
i == 0 ? "*" : "");
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "1: %uMhz %s\n",
+ size += sprintf(buf + size, "1: %uMhz %s\n",
i == 1 ? now : SMU10_UMD_PSTATE_GFXCLK,
i == 1 ? "*" : "");
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "2: %uMhz %s\n",
+ size += sprintf(buf + size, "2: %uMhz %s\n",
data->gfx_max_freq_limit/100,
i == 2 ? "*" : "");
break;
@@ -919,7 +921,7 @@ static int smu10_print_clock_levels(stru
now = smum_get_argument(hwmgr);
for (i = 0; i < mclk_table->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i,
mclk_table->entries[i].clk / 100,
((mclk_table->entries[i].clk / 100)
@@ -1264,11 +1266,11 @@ static int smu10_get_power_profile_mode(
if (!buf)
return -EINVAL;
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%s %16s %s %s %s %s\n",title[0],
+ size += sprintf(buf + size, "%s %16s %s %s %s %s\n",title[0],
title[1], title[2], title[3], title[4], title[5]);
for (i = 0; i <= PP_SMC_POWER_PROFILE_COMPUTE; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%3d %14s%s: %14d %3d %10d %14d\n",
+ size += sprintf(buf + size, "%3d %14s%s: %14d %3d %10d %14d\n",
i, profile_name[i], (i == hwmgr->power_profile_mode) ? "*" : " ",
profile_mode_setting[i][0], profile_mode_setting[i][1],
profile_mode_setting[i][2], profile_mode_setting[i][3]);
Index: src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu7_hwmgr.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu7_hwmgr.c:1.3 src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu7_hwmgr.c:1.4
--- src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu7_hwmgr.c:1.3 Sun Dec 19 12:21:30 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu7_hwmgr.c Sun Dec 19 12:37:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: amdgpu_smu7_hwmgr.c,v 1.3 2021/12/19 12:21:30 riastradh Exp $ */
+/* $NetBSD: amdgpu_smu7_hwmgr.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $ */
/*
* Copyright 2015 Advanced Micro Devices, Inc.
@@ -23,7 +23,7 @@
*
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_smu7_hwmgr.c,v 1.3 2021/12/19 12:21:30 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_smu7_hwmgr.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $");
#include "pp_debug.h"
#include <linux/delay.h>
@@ -57,6 +57,8 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_smu7_
#include "ivsrcid/ivsrcid_vislands30.h"
+#include <linux/nbsd-namespace.h>
+
#define MC_CG_ARB_FREQ_F0 0x0a
#define MC_CG_ARB_FREQ_F1 0x0b
#define MC_CG_ARB_FREQ_F2 0x0c
@@ -4470,7 +4472,7 @@ static int smu7_print_clock_levels(struc
now = i;
for (i = 0; i < sclk_table->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, sclk_table->dpm_levels[i].value / 100,
(i == now) ? "*" : "");
break;
@@ -4486,7 +4488,7 @@ static int smu7_print_clock_levels(struc
now = i;
for (i = 0; i < mclk_table->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, mclk_table->dpm_levels[i].value / 100,
(i == now) ? "*" : "");
break;
@@ -4500,7 +4502,7 @@ static int smu7_print_clock_levels(struc
now = i;
for (i = 0; i < pcie_table->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %s %s\n", i,
+ size += sprintf(buf + size, "%d: %s %s\n", i,
(pcie_table->dpm_levels[i].value == 0) ? "2.5GT/s, x8" :
(pcie_table->dpm_levels[i].value == 1) ? "5.0GT/s, x16" :
(pcie_table->dpm_levels[i].value == 2) ? "8.0GT/s, x16" : "",
@@ -4508,32 +4510,32 @@ static int smu7_print_clock_levels(struc
break;
case OD_SCLK:
if (hwmgr->od_enabled) {
- size = snprintf(buf, SIZE_MAX/*XXX*/, "%s:\n", "OD_SCLK");
+ size = sprintf(buf, "%s:\n", "OD_SCLK");
for (i = 0; i < odn_sclk_table->num_of_pl; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %10uMHz %10umV\n",
+ size += sprintf(buf + size, "%d: %10uMHz %10umV\n",
i, odn_sclk_table->entries[i].clock/100,
odn_sclk_table->entries[i].vddc);
}
break;
case OD_MCLK:
if (hwmgr->od_enabled) {
- size = snprintf(buf, SIZE_MAX/*XXX*/, "%s:\n", "OD_MCLK");
+ size = sprintf(buf, "%s:\n", "OD_MCLK");
for (i = 0; i < odn_mclk_table->num_of_pl; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %10uMHz %10umV\n",
+ size += sprintf(buf + size, "%d: %10uMHz %10umV\n",
i, odn_mclk_table->entries[i].clock/100,
odn_mclk_table->entries[i].vddc);
}
break;
case OD_RANGE:
if (hwmgr->od_enabled) {
- size = snprintf(buf, SIZE_MAX/*XXX*/, "%s:\n", "OD_RANGE");
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "SCLK: %7uMHz %10uMHz\n",
+ size = sprintf(buf, "%s:\n", "OD_RANGE");
+ size += sprintf(buf + size, "SCLK: %7uMHz %10uMHz\n",
data->golden_dpm_table.sclk_table.dpm_levels[0].value/100,
hwmgr->platform_descriptor.overdriveLimit.engineClock/100);
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "MCLK: %7uMHz %10uMHz\n",
+ size += sprintf(buf + size, "MCLK: %7uMHz %10uMHz\n",
data->golden_dpm_table.mclk_table.dpm_levels[0].value/100,
hwmgr->platform_descriptor.overdriveLimit.memoryClock/100);
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "VDDC: %7umV %11umV\n",
+ size += sprintf(buf + size, "VDDC: %7umV %11umV\n",
data->odn_dpm_table.min_vddc,
data->odn_dpm_table.max_vddc);
}
@@ -4944,7 +4946,7 @@ static int smu7_get_power_profile_mode(s
if (!buf)
return -EINVAL;
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%s %16s %16s %16s %16s %16s %16s %16s\n",
+ size += sprintf(buf + size, "%s %16s %16s %16s %16s %16s %16s %16s\n",
title[0], title[1], title[2], title[3],
title[4], title[5], title[6], title[7]);
@@ -4952,7 +4954,7 @@ static int smu7_get_power_profile_mode(s
for (i = 0; i < len; i++) {
if (i == hwmgr->power_profile_mode) {
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%3d %14s %s: %8d %16d %16d %16d %16d %16d\n",
+ size += sprintf(buf + size, "%3d %14s %s: %8d %16d %16d %16d %16d %16d\n",
i, profile_name[i], "*",
data->current_profile_setting.sclk_up_hyst,
data->current_profile_setting.sclk_down_hyst,
@@ -4963,21 +4965,21 @@ static int smu7_get_power_profile_mode(s
continue;
}
if (smu7_profiling[i].bupdate_sclk)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%3d %16s: %8d %16d %16d ",
+ size += sprintf(buf + size, "%3d %16s: %8d %16d %16d ",
i, profile_name[i], smu7_profiling[i].sclk_up_hyst,
smu7_profiling[i].sclk_down_hyst,
smu7_profiling[i].sclk_activity);
else
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%3d %16s: %8s %16s %16s ",
+ size += sprintf(buf + size, "%3d %16s: %8s %16s %16s ",
i, profile_name[i], "-", "-", "-");
if (smu7_profiling[i].bupdate_mclk)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%16d %16d %16d\n",
+ size += sprintf(buf + size, "%16d %16d %16d\n",
smu7_profiling[i].mclk_up_hyst,
smu7_profiling[i].mclk_down_hyst,
smu7_profiling[i].mclk_activity);
else
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%16s %16s %16s\n",
+ size += sprintf(buf + size, "%16s %16s %16s\n",
"-", "-", "-");
}
Index: src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu8_hwmgr.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu8_hwmgr.c:1.3 src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu8_hwmgr.c:1.4
--- src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu8_hwmgr.c:1.3 Sun Dec 19 12:21:30 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_smu8_hwmgr.c Sun Dec 19 12:37:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: amdgpu_smu8_hwmgr.c,v 1.3 2021/12/19 12:21:30 riastradh Exp $ */
+/* $NetBSD: amdgpu_smu8_hwmgr.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $ */
/*
* Copyright 2015 Advanced Micro Devices, Inc.
@@ -23,7 +23,7 @@
*
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_smu8_hwmgr.c,v 1.3 2021/12/19 12:21:30 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_smu8_hwmgr.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $");
#include "pp_debug.h"
#include <linux/types.h>
@@ -44,6 +44,8 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_smu8_
#include "power_state.h"
#include "pp_thermal.h"
+#include <linux/nbsd-namespace.h>
+
#define ixSMUSVI_NB_CURRENTVID 0xD8230044
#define CURRENT_NB_VID_MASK 0xff000000
#define CURRENT_NB_VID__SHIFT 24
@@ -1531,7 +1533,7 @@ static int smu8_print_clock_levels(struc
CURR_SCLK_INDEX);
for (i = 0; i < sclk_table->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, sclk_table->entries[i].clk / 100,
(i == now) ? "*" : "");
break;
@@ -1543,7 +1545,7 @@ static int smu8_print_clock_levels(struc
CURR_MCLK_INDEX);
for (i = SMU8_NUM_NBPMEMORYCLOCK; i > 0; i--)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
SMU8_NUM_NBPMEMORYCLOCK-i, data->sys_info.nbp_memory_clock[i-1] / 100,
(SMU8_NUM_NBPMEMORYCLOCK-i == now) ? "*" : "");
break;
Index: src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega10_hwmgr.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega10_hwmgr.c:1.3 src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega10_hwmgr.c:1.4
--- src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega10_hwmgr.c:1.3 Sun Dec 19 12:21:30 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega10_hwmgr.c Sun Dec 19 12:37:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: amdgpu_vega10_hwmgr.c,v 1.3 2021/12/19 12:21:30 riastradh Exp $ */
+/* $NetBSD: amdgpu_vega10_hwmgr.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $ */
/*
* Copyright 2016 Advanced Micro Devices, Inc.
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_vega10_hwmgr.c,v 1.3 2021/12/19 12:21:30 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_vega10_hwmgr.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $");
#include <linux/delay.h>
#include <linux/fb.h>
@@ -59,6 +59,8 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_vega1
#include "smuio/smuio_9_0_offset.h"
#include "smuio/smuio_9_0_sh_mask.h"
+#include <linux/nbsd-namespace.h>
+
#define HBM_MEMORY_CHANNEL_WIDTH 128
static const uint32_t channel_number[] = {1, 2, 0, 4, 0, 8, 0, 16, 2};
@@ -4476,13 +4478,13 @@ static int vega10_get_ppfeature_status(s
"[EnableAllSmuFeatures] Failed to get enabled smc features!",
return ret);
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "Current ppfeatures: 0x%016"PRIx64"\n", features_enabled);
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%-19s %-22s %s\n",
+ size += sprintf(buf + size, "Current ppfeatures: 0x%016"PRIx64"\n", features_enabled);
+ size += sprintf(buf + size, "%-19s %-22s %s\n",
output_title[0],
output_title[1],
output_title[2]);
for (i = 0; i < GNLD_FEATURES_MAX; i++) {
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%-19s 0x%016llx %6s\n",
+ size += sprintf(buf + size, "%-19s 0x%016llx %6s\n",
ppfeature_name[i],
1ULL << i,
(features_enabled & (1ULL << i)) ? "Y" : "N");
@@ -4555,7 +4557,7 @@ static int vega10_print_clock_levels(str
else
count = sclk_table->count;
for (i = 0; i < count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, sclk_table->dpm_levels[i].value / 100,
(i == now) ? "*" : "");
break;
@@ -4567,7 +4569,7 @@ static int vega10_print_clock_levels(str
now = smum_get_argument(hwmgr);
for (i = 0; i < mclk_table->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, mclk_table->dpm_levels[i].value / 100,
(i == now) ? "*" : "");
break;
@@ -4579,7 +4581,7 @@ static int vega10_print_clock_levels(str
now = smum_get_argument(hwmgr);
for (i = 0; i < soc_table->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, soc_table->dpm_levels[i].value / 100,
(i == now) ? "*" : "");
break;
@@ -4592,7 +4594,7 @@ static int vega10_print_clock_levels(str
now = smum_get_argument(hwmgr);
for (i = 0; i < dcef_table->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, dcef_table->dpm_levels[i].value / 100,
(dcef_table->dpm_levels[i].value / 100 == now) ?
"*" : "");
@@ -4602,7 +4604,7 @@ static int vega10_print_clock_levels(str
now = smum_get_argument(hwmgr);
for (i = 0; i < pcie_table->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %s %s\n", i,
+ size += sprintf(buf + size, "%d: %s %s\n", i,
(pcie_table->pcie_gen[i] == 0) ? "2.5GT/s, x1" :
(pcie_table->pcie_gen[i] == 1) ? "5.0GT/s, x16" :
(pcie_table->pcie_gen[i] == 2) ? "8.0GT/s, x16" : "",
@@ -4610,34 +4612,34 @@ static int vega10_print_clock_levels(str
break;
case OD_SCLK:
if (hwmgr->od_enabled) {
- size = snprintf(buf, SIZE_MAX/*XXX*/, "%s:\n", "OD_SCLK");
+ size = sprintf(buf, "%s:\n", "OD_SCLK");
podn_vdd_dep = &data->odn_dpm_table.vdd_dep_on_sclk;
for (i = 0; i < podn_vdd_dep->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %10uMhz %10umV\n",
+ size += sprintf(buf + size, "%d: %10uMhz %10umV\n",
i, podn_vdd_dep->entries[i].clk / 100,
podn_vdd_dep->entries[i].vddc);
}
break;
case OD_MCLK:
if (hwmgr->od_enabled) {
- size = snprintf(buf, SIZE_MAX/*XXX*/, "%s:\n", "OD_MCLK");
+ size = sprintf(buf, "%s:\n", "OD_MCLK");
podn_vdd_dep = &data->odn_dpm_table.vdd_dep_on_mclk;
for (i = 0; i < podn_vdd_dep->count; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %10uMhz %10umV\n",
+ size += sprintf(buf + size, "%d: %10uMhz %10umV\n",
i, podn_vdd_dep->entries[i].clk/100,
podn_vdd_dep->entries[i].vddc);
}
break;
case OD_RANGE:
if (hwmgr->od_enabled) {
- size = snprintf(buf, SIZE_MAX/*XXX*/, "%s:\n", "OD_RANGE");
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "SCLK: %7uMHz %10uMHz\n",
+ size = sprintf(buf, "%s:\n", "OD_RANGE");
+ size += sprintf(buf + size, "SCLK: %7uMHz %10uMHz\n",
data->golden_dpm_table.gfx_table.dpm_levels[0].value/100,
hwmgr->platform_descriptor.overdriveLimit.engineClock/100);
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "MCLK: %7uMHz %10uMHz\n",
+ size += sprintf(buf + size, "MCLK: %7uMHz %10uMHz\n",
data->golden_dpm_table.mem_table.dpm_levels[0].value/100,
hwmgr->platform_descriptor.overdriveLimit.memoryClock/100);
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "VDDC: %7umV %11umV\n",
+ size += sprintf(buf + size, "VDDC: %7umV %11umV\n",
data->odn_dpm_table.min_vddc,
data->odn_dpm_table.max_vddc);
}
@@ -4999,15 +5001,15 @@ static int vega10_get_power_profile_mode
if (!buf)
return -EINVAL;
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%s %16s %s %s %s %s\n",title[0],
+ size += sprintf(buf + size, "%s %16s %s %s %s %s\n",title[0],
title[1], title[2], title[3], title[4], title[5]);
for (i = 0; i < PP_SMC_POWER_PROFILE_CUSTOM; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%3d %14s%s: %14d %3d %10d %14d\n",
+ size += sprintf(buf + size, "%3d %14s%s: %14d %3d %10d %14d\n",
i, profile_name[i], (i == hwmgr->power_profile_mode) ? "*" : " ",
profile_mode_setting[i][0], profile_mode_setting[i][1],
profile_mode_setting[i][2], profile_mode_setting[i][3]);
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%3d %14s%s: %14d %3d %10d %14d\n", i,
+ size += sprintf(buf + size, "%3d %14s%s: %14d %3d %10d %14d\n", i,
profile_name[i], (i == hwmgr->power_profile_mode) ? "*" : " ",
data->custom_profile_mode[0], data->custom_profile_mode[1],
data->custom_profile_mode[2], data->custom_profile_mode[3]);
Index: src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega12_hwmgr.c
diff -u src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega12_hwmgr.c:1.3 src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega12_hwmgr.c:1.4
--- src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega12_hwmgr.c:1.3 Sun Dec 19 12:21:30 2021
+++ src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/amdgpu_vega12_hwmgr.c Sun Dec 19 12:37:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: amdgpu_vega12_hwmgr.c,v 1.3 2021/12/19 12:21:30 riastradh Exp $ */
+/* $NetBSD: amdgpu_vega12_hwmgr.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $ */
/*
* Copyright 2017 Advanced Micro Devices, Inc.
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_vega12_hwmgr.c,v 1.3 2021/12/19 12:21:30 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_vega12_hwmgr.c,v 1.4 2021/12/19 12:37:54 riastradh Exp $");
#include <linux/delay.h>
#include <linux/fb.h>
@@ -52,6 +52,8 @@ __KERNEL_RCSID(0, "$NetBSD: amdgpu_vega1
#include "pp_thermal.h"
#include "vega12_baco.h"
+#include <linux/nbsd-namespace.h>
+
static int vega12_force_clock_level(struct pp_hwmgr *hwmgr,
enum pp_clock_type type, uint32_t mask);
@@ -2035,13 +2037,13 @@ static int vega12_get_ppfeature_status(s
"[EnableAllSmuFeatures] Failed to get enabled smc features!",
return ret);
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "Current ppfeatures: 0x%016"PRIx64"\n", features_enabled);
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%-19s %-22s %s\n",
+ size += sprintf(buf + size, "Current ppfeatures: 0x%016"PRIx64"\n", features_enabled);
+ size += sprintf(buf + size, "%-19s %-22s %s\n",
output_title[0],
output_title[1],
output_title[2]);
for (i = 0; i < GNLD_FEATURES_MAX; i++) {
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%-19s 0x%016llx %6s\n",
+ size += sprintf(buf + size, "%-19s 0x%016llx %6s\n",
ppfeature_name[i],
1ULL << i,
(features_enabled & (1ULL << i)) ? "Y" : "N");
@@ -2105,7 +2107,7 @@ static int vega12_print_clock_levels(str
"Attempt to get gfx clk levels Failed!",
return -1);
for (i = 0; i < clocks.num_levels; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, clocks.data[i].clocks_in_khz / 1000,
(clocks.data[i].clocks_in_khz / 1000 == now / 100) ? "*" : "");
break;
@@ -2121,7 +2123,7 @@ static int vega12_print_clock_levels(str
"Attempt to get memory clk levels Failed!",
return -1);
for (i = 0; i < clocks.num_levels; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, clocks.data[i].clocks_in_khz / 1000,
(clocks.data[i].clocks_in_khz / 1000 == now / 100) ? "*" : "");
break;
@@ -2139,7 +2141,7 @@ static int vega12_print_clock_levels(str
"Attempt to get soc clk levels Failed!",
return -1);
for (i = 0; i < clocks.num_levels; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, clocks.data[i].clocks_in_khz / 1000,
(clocks.data[i].clocks_in_khz / 1000 == now) ? "*" : "");
break;
@@ -2157,7 +2159,7 @@ static int vega12_print_clock_levels(str
"Attempt to get dcef clk levels Failed!",
return -1);
for (i = 0; i < clocks.num_levels; i++)
- size += snprintf(buf + size, SIZE_MAX/*XXX*/, "%d: %uMhz %s\n",
+ size += sprintf(buf + size, "%d: %uMhz %s\n",
i, clocks.data[i].clocks_in_khz / 1000,
(clocks.data[i].clocks_in_khz / 1000 == now) ? "*" : "");
break;
