Module Name: src
Committed By: jmcneill
Date: Sun Feb 6 15:52:21 UTC 2022
Modified Files:
src/sys/arch/arm/broadcom: bcm2838_emmc2_acpi.c
src/sys/arch/arm/nvidia: tegra_sdhc.c
src/sys/arch/arm/nxp: imx_sdhc.c
src/sys/arch/arm/omap: omap3_sdhc.c
src/sys/arch/arm/ti: ti_sdhc.c
src/sys/dev/acpi: sdhc_acpi.c
src/sys/dev/fdt: arasan_sdhc_fdt.c
src/sys/dev/sdmmc: sdhc.c sdhcvar.h
Log Message:
sdhc: Retire SDHC_FLAG_USE_ADMA2 flag.
ADMA2 support in sdhc is mature now, so no need for it to be opt-in.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/nvidia/tegra_sdhc.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/nxp/imx_sdhc.c
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/omap/omap3_sdhc.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/ti/ti_sdhc.c
cvs rdiff -u -r1.19 -r1.20 src/sys/dev/acpi/sdhc_acpi.c
cvs rdiff -u -r1.8 -r1.9 src/sys/dev/fdt/arasan_sdhc_fdt.c
cvs rdiff -u -r1.114 -r1.115 src/sys/dev/sdmmc/sdhc.c
cvs rdiff -u -r1.31 -r1.32 src/sys/dev/sdmmc/sdhcvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c
diff -u src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c:1.2 src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c:1.3
--- src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c:1.2 Sun Aug 8 10:59:27 2021
+++ src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c Sun Feb 6 15:52:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2838_emmc2_acpi.c,v 1.2 2021/08/08 10:59:27 jmcneill Exp $ */
+/* $NetBSD: bcm2838_emmc2_acpi.c,v 1.3 2022/02/06 15:52:20 jmcneill Exp $ */
/*
* Copyright (c) 2021 Jared McNeill <jmcne...@invisible.ca>
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bcm2838_emmc2_acpi.c,v 1.2 2021/08/08 10:59:27 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2838_emmc2_acpi.c,v 1.3 2022/02/06 15:52:20 jmcneill Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -121,7 +121,6 @@ bcmemmc2_acpi_attach(device_t parent, de
sc->sc.sc_flags = SDHC_FLAG_32BIT_ACCESS |
#if notyet
SDHC_FLAG_USE_DMA |
- SDHC_FLAG_USE_ADMA2 |
#endif
SDHC_FLAG_NO_1_8_V;
Index: src/sys/arch/arm/nvidia/tegra_sdhc.c
diff -u src/sys/arch/arm/nvidia/tegra_sdhc.c:1.31 src/sys/arch/arm/nvidia/tegra_sdhc.c:1.32
--- src/sys/arch/arm/nvidia/tegra_sdhc.c:1.31 Sun Feb 6 15:40:55 2022
+++ src/sys/arch/arm/nvidia/tegra_sdhc.c Sun Feb 6 15:52:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_sdhc.c,v 1.31 2022/02/06 15:40:55 jmcneill Exp $ */
+/* $NetBSD: tegra_sdhc.c,v 1.32 2022/02/06 15:52:20 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcne...@invisible.ca>
@@ -31,7 +31,7 @@
#include "locators.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_sdhc.c,v 1.31 2022/02/06 15:40:55 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_sdhc.c,v 1.32 2022/02/06 15:52:20 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -130,7 +130,6 @@ tegra_sdhc_attach(device_t parent, devic
SDHC_FLAG_SINGLE_POWER_WRITE |
SDHC_FLAG_NO_HS_BIT |
SDHC_FLAG_USE_DMA |
- SDHC_FLAG_USE_ADMA2 |
SDHC_FLAG_BROKEN_ADMA2_ZEROLEN;
if (bus_width == 8) {
sc->sc.sc_flags |= SDHC_FLAG_8BIT_MODE;
Index: src/sys/arch/arm/nxp/imx_sdhc.c
diff -u src/sys/arch/arm/nxp/imx_sdhc.c:1.6 src/sys/arch/arm/nxp/imx_sdhc.c:1.7
--- src/sys/arch/arm/nxp/imx_sdhc.c:1.6 Wed Jan 27 03:10:20 2021
+++ src/sys/arch/arm/nxp/imx_sdhc.c Sun Feb 6 15:52:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: imx_sdhc.c,v 1.6 2021/01/27 03:10:20 thorpej Exp $ */
+/* $NetBSD: imx_sdhc.c,v 1.7 2022/02/06 15:52:20 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Genetec Corporation. All rights reserved.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: imx_sdhc.c,v 1.6 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx_sdhc.c,v 1.7 2022/02/06 15:52:20 jmcneill Exp $");
#include "opt_fdt.h"
@@ -140,7 +140,6 @@ imx_sdhc_attach(device_t parent, device_
SDHC_FLAG_NO_PWR0 |
SDHC_FLAG_HAVE_DVS |
SDHC_FLAG_32BIT_ACCESS |
- SDHC_FLAG_USE_ADMA2 |
SDHC_FLAG_USDHC;
sc->sc_sdhc.sc_flags |= conf->flags;
Index: src/sys/arch/arm/omap/omap3_sdhc.c
diff -u src/sys/arch/arm/omap/omap3_sdhc.c:1.30 src/sys/arch/arm/omap/omap3_sdhc.c:1.31
--- src/sys/arch/arm/omap/omap3_sdhc.c:1.30 Mon Sep 3 16:29:23 2018
+++ src/sys/arch/arm/omap/omap3_sdhc.c Sun Feb 6 15:52:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: omap3_sdhc.c,v 1.30 2018/09/03 16:29:23 riastradh Exp $ */
+/* $NetBSD: omap3_sdhc.c,v 1.31 2022/02/06 15:52:20 jmcneill Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: omap3_sdhc.c,v 1.30 2018/09/03 16:29:23 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: omap3_sdhc.c,v 1.31 2022/02/06 15:52:20 jmcneill Exp $");
#include "opt_omap.h"
#include "edma.h"
@@ -95,6 +95,7 @@ struct mmchs_softc {
struct sdhc_host *sc_hosts[1];
int sc_irq;
void *sc_ih; /* interrupt vectoring */
+ bool sc_use_adma2;
#if NEDMA > 0
int sc_edmabase;
@@ -454,7 +455,7 @@ no_dma:
}
if (hwinfo & HL_HWINFO_MADMA_EN) {
sc->sc.sc_flags |= SDHC_FLAG_USE_DMA;
- sc->sc.sc_flags |= SDHC_FLAG_USE_ADMA2;
+ sc->sc_use_adma2 = true;
}
aprint_normal_dev(sc->sc.sc_dev, "IP Rev 0x%08x%s",
rev, hwinfo & HL_HWINFO_RETMODE ? ", Retention Mode" : "");
@@ -571,10 +572,11 @@ no_dma:
SDHC_WRITE(sc, SDHC_CLOCK_CTL,
SDHC_READ(sc, SDHC_CLOCK_CTL) | SDHC_SDCLK_ENABLE);
- if (sc->sc.sc_flags & SDHC_FLAG_USE_ADMA2)
+ if (sc->sc_use_adma2) {
bus_space_write_4(sc->sc_bst, sc->sc_bsh, MMCHS_CON,
bus_space_read_4(sc->sc_bst, sc->sc_bsh, MMCHS_CON) |
CON_MNS);
+ }
}
static int
Index: src/sys/arch/arm/ti/ti_sdhc.c
diff -u src/sys/arch/arm/ti/ti_sdhc.c:1.11 src/sys/arch/arm/ti/ti_sdhc.c:1.12
--- src/sys/arch/arm/ti/ti_sdhc.c:1.11 Sun Nov 7 17:12:45 2021
+++ src/sys/arch/arm/ti/ti_sdhc.c Sun Feb 6 15:52:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: ti_sdhc.c,v 1.11 2021/11/07 17:12:45 jmcneill Exp $ */
+/* $NetBSD: ti_sdhc.c,v 1.12 2022/02/06 15:52:20 jmcneill Exp $ */
/*-
* Copyright (c) 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ti_sdhc.c,v 1.11 2021/11/07 17:12:45 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ti_sdhc.c,v 1.12 2022/02/06 15:52:20 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -397,10 +397,13 @@ no_dma:
SDHC_WRITE(sc, SDHC_CLOCK_CTL,
SDHC_READ(sc, SDHC_CLOCK_CTL) | SDHC_SDCLK_ENABLE);
- if (sc->sc.sc_flags & SDHC_FLAG_USE_ADMA2)
+#if notyet
+ if (sc->sc_use_adma2) {
bus_space_write_4(sc->sc_bst, sc->sc_bsh, MMCHS_CON,
bus_space_read_4(sc->sc_bst, sc->sc_bsh, MMCHS_CON) |
CON_MNS);
+ }
+#endif
}
static int
Index: src/sys/dev/acpi/sdhc_acpi.c
diff -u src/sys/dev/acpi/sdhc_acpi.c:1.19 src/sys/dev/acpi/sdhc_acpi.c:1.20
--- src/sys/dev/acpi/sdhc_acpi.c:1.19 Sat Jan 15 18:02:33 2022
+++ src/sys/dev/acpi/sdhc_acpi.c Sun Feb 6 15:52:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhc_acpi.c,v 1.19 2022/01/15 18:02:33 jmcneill Exp $ */
+/* $NetBSD: sdhc_acpi.c,v 1.20 2022/02/06 15:52:20 jmcneill Exp $ */
/*
* Copyright (c) 2016 Kimihiro Nonaka <non...@netbsd.org>
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc_acpi.c,v 1.19 2022/01/15 18:02:33 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc_acpi.c,v 1.20 2022/02/06 15:52:20 jmcneill Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -108,7 +108,6 @@ static const struct sdhc_acpi_slot {
{ .hid = "RKCP0D40", .type = SLOT_TYPE_SD,
.flags = SDHC_FLAG_32BIT_ACCESS |
SDHC_FLAG_8BIT_MODE |
- SDHC_FLAG_USE_ADMA2 |
SDHC_FLAG_SINGLE_POWER_WRITE },
/* Generic IDs last */
Index: src/sys/dev/fdt/arasan_sdhc_fdt.c
diff -u src/sys/dev/fdt/arasan_sdhc_fdt.c:1.8 src/sys/dev/fdt/arasan_sdhc_fdt.c:1.9
--- src/sys/dev/fdt/arasan_sdhc_fdt.c:1.8 Sun Jan 23 08:01:33 2022
+++ src/sys/dev/fdt/arasan_sdhc_fdt.c Sun Feb 6 15:52:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: arasan_sdhc_fdt.c,v 1.8 2022/01/23 08:01:33 skrll Exp $ */
+/* $NetBSD: arasan_sdhc_fdt.c,v 1.9 2022/02/06 15:52:20 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: arasan_sdhc_fdt.c,v 1.8 2022/01/23 08:01:33 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arasan_sdhc_fdt.c,v 1.9 2022/02/06 15:52:20 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -288,7 +288,6 @@ arasan_sdhc_attach(device_t parent, devi
SDHC_FLAG_SINGLE_POWER_WRITE |
SDHC_FLAG_32BIT_ACCESS |
SDHC_FLAG_USE_DMA |
- SDHC_FLAG_USE_ADMA2 |
SDHC_FLAG_STOP_WITH_TC;
if (bus_width == 8)
sc->sc_base.sc_flags |= SDHC_FLAG_8BIT_MODE;
Index: src/sys/dev/sdmmc/sdhc.c
diff -u src/sys/dev/sdmmc/sdhc.c:1.114 src/sys/dev/sdmmc/sdhc.c:1.115
--- src/sys/dev/sdmmc/sdhc.c:1.114 Mon Jan 17 20:10:37 2022
+++ src/sys/dev/sdmmc/sdhc.c Sun Feb 6 15:52:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhc.c,v 1.114 2022/01/17 20:10:37 mrg Exp $ */
+/* $NetBSD: sdhc.c,v 1.115 2022/02/06 15:52:20 jmcneill Exp $ */
/* $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $ */
/*
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.114 2022/01/17 20:10:37 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.115 2022/02/06 15:52:20 jmcneill Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -415,8 +415,7 @@ sdhc_host_found(struct sdhc_softc *sc, b
ISSET(caps, SDHC_DMA_SUPPORT)))) {
SET(hp->flags, SHF_USE_DMA);
- if (ISSET(sc->sc_flags, SDHC_FLAG_USE_ADMA2) &&
- ISSET(caps, SDHC_ADMA2_SUPP)) {
+ if (ISSET(caps, SDHC_ADMA2_SUPP)) {
SET(hp->flags, SHF_MODE_DMAEN);
/*
* 64-bit mode was present in the 2.00 spec, removed
Index: src/sys/dev/sdmmc/sdhcvar.h
diff -u src/sys/dev/sdmmc/sdhcvar.h:1.31 src/sys/dev/sdmmc/sdhcvar.h:1.32
--- src/sys/dev/sdmmc/sdhcvar.h:1.31 Wed Oct 23 05:20:52 2019
+++ src/sys/dev/sdmmc/sdhcvar.h Sun Feb 6 15:52:20 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhcvar.h,v 1.31 2019/10/23 05:20:52 hkenken Exp $ */
+/* $NetBSD: sdhcvar.h,v 1.32 2022/02/06 15:52:20 jmcneill Exp $ */
/* $OpenBSD: sdhcvar.h,v 1.3 2007/09/06 08:01:01 jsg Exp $ */
/*
@@ -55,18 +55,17 @@ struct sdhc_softc {
#define SDHC_FLAG_NO_CLKBASE 0x00020000 /* ignore clkbase register */
#define SDHC_FLAG_SINGLE_POWER_WRITE 0x00040000
#define SDHC_FLAG_NO_TIMEOUT 0x00080000 /* ignore timeout interrupts */
-#define SDHC_FLAG_USE_ADMA2 0x00100000
-#define SDHC_FLAG_POLL_CARD_DET 0x00200000 /* polling card detect */
-#define SDHC_FLAG_SLOW_SDR50 0x00400000 /* reduce SDR50 speed */
-#define SDHC_FLAG_USDHC 0x00800000 /* Freescale uSDHC */
-#define SDHC_FLAG_NO_AUTO_STOP 0x01000000 /* No auto CMD12 */
-#define SDHC_FLAG_NO_BUSY_INTR 0x02000000 /* No intr when RESP_BUSY */
-#define SDHC_FLAG_STOP_WITH_TC 0x04000000 /* CMD12 can set xfer complete w/o SCF_RSP_BSY */
-#define SDHC_FLAG_BROKEN_ADMA2_ZEROLEN 0x08000000 /*
+#define SDHC_FLAG_POLL_CARD_DET 0x00100000 /* polling card detect */
+#define SDHC_FLAG_SLOW_SDR50 0x00200000 /* reduce SDR50 speed */
+#define SDHC_FLAG_USDHC 0x00400000 /* Freescale uSDHC */
+#define SDHC_FLAG_NO_AUTO_STOP 0x00800000 /* No auto CMD12 */
+#define SDHC_FLAG_NO_BUSY_INTR 0x01000000 /* No intr when RESP_BUSY */
+#define SDHC_FLAG_STOP_WITH_TC 0x02000000 /* CMD12 can set xfer complete w/o SCF_RSP_BSY */
+#define SDHC_FLAG_BROKEN_ADMA2_ZEROLEN 0x04000000 /*
* Broken ADMA2 zero length descriptor
* Can't 64K Byte data transfer
*/
-#define SDHC_FLAG_NO_1_8_V 0x10000000 /* No 1.8V supply */
+#define SDHC_FLAG_NO_1_8_V 0x08000000 /* No 1.8V supply */
uint32_t sc_clkbase;
int sc_clkmsk; /* Mask for SDCLK */
