Module Name: src Committed By: riastradh Date: Wed Feb 16 23:49:27 UTC 2022
Modified Files: src/sys/arch/amiga/amiga: bus.c src/sys/arch/amigappc/amigappc: p5reg.h src/sys/arch/amigappc/include: bus_funcs.h cpu.h src/sys/arch/bebox/stand/boot: io.c pci.c vreset.c src/sys/arch/evbppc/pmppc/dev: if_cs_mainbus.c src/sys/arch/ibmnws/ibmnws: machdep.c src/sys/arch/macppc/dev: if_mc.c mediabay.c valkyriefb.c zs.c src/sys/arch/powerpc/include: pio.h src/sys/arch/powerpc/oea: pmap.c src/sys/arch/powerpc/pic: intr.c src/sys/arch/powerpc/powerpc: bus_dma.c src/sys/arch/prep/stand/boot: io.c pci.c vreset.c src/sys/arch/rs6000/stand/boot: boot.c src/sys/arch/sandpoint/stand/altboot: brdsetup.c Log Message: powerpc: Sprinkle "memory" clobbers on eieio and nearby asm blocks. Otherwise the compiler may reorder these around loads and stores, which mostly defeats the purpose. `asm volatile' just ensures the instruction isn't _deleted_; it may still move around. To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 src/sys/arch/amiga/amiga/bus.c cvs rdiff -u -r1.2 -r1.3 src/sys/arch/amigappc/amigappc/p5reg.h cvs rdiff -u -r1.1 -r1.2 src/sys/arch/amigappc/include/bus_funcs.h cvs rdiff -u -r1.20 -r1.21 src/sys/arch/amigappc/include/cpu.h cvs rdiff -u -r1.7 -r1.8 src/sys/arch/bebox/stand/boot/io.c cvs rdiff -u -r1.5 -r1.6 src/sys/arch/bebox/stand/boot/pci.c cvs rdiff -u -r1.14 -r1.15 src/sys/arch/bebox/stand/boot/vreset.c cvs rdiff -u -r1.8 -r1.9 src/sys/arch/evbppc/pmppc/dev/if_cs_mainbus.c cvs rdiff -u -r1.18 -r1.19 src/sys/arch/ibmnws/ibmnws/machdep.c cvs rdiff -u -r1.27 -r1.28 src/sys/arch/macppc/dev/if_mc.c \ src/sys/arch/macppc/dev/mediabay.c cvs rdiff -u -r1.7 -r1.8 src/sys/arch/macppc/dev/valkyriefb.c cvs rdiff -u -r1.55 -r1.56 src/sys/arch/macppc/dev/zs.c cvs rdiff -u -r1.9 -r1.10 src/sys/arch/powerpc/include/pio.h cvs rdiff -u -r1.108 -r1.109 src/sys/arch/powerpc/oea/pmap.c cvs rdiff -u -r1.33 -r1.34 src/sys/arch/powerpc/pic/intr.c cvs rdiff -u -r1.53 -r1.54 src/sys/arch/powerpc/powerpc/bus_dma.c cvs rdiff -u -r1.5 -r1.6 src/sys/arch/prep/stand/boot/io.c cvs rdiff -u -r1.2 -r1.3 src/sys/arch/prep/stand/boot/pci.c cvs rdiff -u -r1.9 -r1.10 src/sys/arch/prep/stand/boot/vreset.c cvs rdiff -u -r1.6 -r1.7 src/sys/arch/rs6000/stand/boot/boot.c cvs rdiff -u -r1.40 -r1.41 src/sys/arch/sandpoint/stand/altboot/brdsetup.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/amiga/amiga/bus.c diff -u src/sys/arch/amiga/amiga/bus.c:1.2 src/sys/arch/amiga/amiga/bus.c:1.3 --- src/sys/arch/amiga/amiga/bus.c:1.2 Thu Nov 12 12:01:53 2015 +++ src/sys/arch/amiga/amiga/bus.c Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: bus.c,v 1.2 2015/11/12 12:01:53 phx Exp $ */ +/* $NetBSD: bus.c,v 1.3 2022/02/16 23:49:26 riastradh Exp $ */ /*- * Copyright (c) 2011 The NetBSD Foundation, Inc. @@ -39,8 +39,8 @@ bus_space_barrier(bus_space_tag_t space, bus_size_t offset, bus_size_t length, int flags) { /* Only amigappc needs barrier. */ -#if defined(__powerpc__) - asm volatile("eieio"); +#if defined(__powerpc__) + asm volatile("eieio" ::: "memory"); #endif } Index: src/sys/arch/amigappc/amigappc/p5reg.h diff -u src/sys/arch/amigappc/amigappc/p5reg.h:1.2 src/sys/arch/amigappc/amigappc/p5reg.h:1.3 --- src/sys/arch/amigappc/amigappc/p5reg.h:1.2 Tue Feb 2 19:15:33 2010 +++ src/sys/arch/amigappc/amigappc/p5reg.h Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: p5reg.h,v 1.2 2010/02/02 19:15:33 phx Exp $ */ +/* $NetBSD: p5reg.h,v 1.3 2022/02/16 23:49:26 riastradh Exp $ */ /* * Copyright (C) 2000 Adam Ciarcinski. @@ -100,13 +100,13 @@ #define P5read(reg, val) \ do { \ (val) = *(volatile unsigned char *)(P5BASE + (reg)); \ - __asm volatile("eieio"); \ + __asm volatile("eieio" ::: "memory"); \ } while (0); #define P5write(reg, val) \ do { \ *(volatile unsigned char *)(P5BASE + (reg)) = (val); \ - __asm volatile("eieio"); \ + __asm volatile("eieio" ::: "memory"); \ } while (0); #endif /* _P5REG_H_ */ Index: src/sys/arch/amigappc/include/bus_funcs.h diff -u src/sys/arch/amigappc/include/bus_funcs.h:1.1 src/sys/arch/amigappc/include/bus_funcs.h:1.2 --- src/sys/arch/amigappc/include/bus_funcs.h:1.1 Mon Jul 18 17:51:17 2011 +++ src/sys/arch/amigappc/include/bus_funcs.h Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: bus_funcs.h,v 1.1 2011/07/18 17:51:17 dyoung Exp $ */ +/* $NetBSD: bus_funcs.h,v 1.2 2022/02/16 23:49:26 riastradh Exp $ */ /* * Copyright (c) 1996 Leo Weppelman. All rights reserved. @@ -141,6 +141,6 @@ ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) /* Instruction for enforcing reorder protection. */ -#define amiga_bus_reorder_protect() __asm volatile ("eieio") +#define amiga_bus_reorder_protect() __asm volatile("eieio" ::: "memory") #endif /* _AMIGAPPC_BUS_FUNCS_H_ */ Index: src/sys/arch/amigappc/include/cpu.h diff -u src/sys/arch/amigappc/include/cpu.h:1.20 src/sys/arch/amigappc/include/cpu.h:1.21 --- src/sys/arch/amigappc/include/cpu.h:1.20 Mon Jun 20 06:35:39 2011 +++ src/sys/arch/amigappc/include/cpu.h Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.20 2011/06/20 06:35:39 matt Exp $ */ +/* $NetBSD: cpu.h,v 1.21 2022/02/16 23:49:26 riastradh Exp $ */ /* * Copyright (C) 1995-1997 Wolfgang Solfrank. @@ -70,12 +70,12 @@ int badaddr_read(void *, size_t, int *); /* * Reorder protection when accessing device registers. */ -#define amiga_membarrier() __asm volatile ("eieio") +#define amiga_membarrier() __asm volatile("eieio" ::: "memory") /* * Finish all bus operations and flush pipelines. */ -#define amiga_cpu_sync() __asm volatile ("sync; isync") +#define amiga_cpu_sync() __asm volatile("sync; isync" ::: "memory") #endif /* _KERNEL && !_MODULE */ Index: src/sys/arch/bebox/stand/boot/io.c diff -u src/sys/arch/bebox/stand/boot/io.c:1.7 src/sys/arch/bebox/stand/boot/io.c:1.8 --- src/sys/arch/bebox/stand/boot/io.c:1.7 Thu Oct 14 05:52:01 2010 +++ src/sys/arch/bebox/stand/boot/io.c Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: io.c,v 1.7 2010/10/14 05:52:01 kiyohara Exp $ */ +/* $NetBSD: io.c,v 1.8 2022/02/16 23:49:26 riastradh Exp $ */ /*- * Copyright (C) 1995-1997 Gary Thomas (g...@linuxppc.org) @@ -124,10 +124,10 @@ _wbinv(uint32_t adr, uint32_t siz) { uint32_t bnd; - asm volatile("eieio"); + asm volatile("eieio" ::: "memory"); for (bnd = adr + siz; adr < bnd; adr += dcache_line_size) - asm volatile ("dcbf 0,%0" :: "r"(adr)); - asm volatile ("sync"); + asm volatile("dcbf 0,%0" :: "r"(adr) : "memory"); + asm volatile("sync" ::: "memory"); } void @@ -138,10 +138,10 @@ _inv(uint32_t adr, uint32_t siz) off = adr & (dcache_line_size - 1); adr -= off; siz += off; - asm volatile ("eieio"); + asm volatile("eieio" ::: "memory"); if (off != 0) { /* wbinv() leading unaligned dcache line */ - asm volatile ("dcbf 0,%0" :: "r"(adr)); + asm volatile("dcbf 0,%0" :: "r"(adr) : "memory"); if (siz < dcache_line_size) goto done; adr += dcache_line_size; @@ -151,15 +151,15 @@ _inv(uint32_t adr, uint32_t siz) off = bnd & (dcache_line_size - 1); if (off != 0) { /* wbinv() trailing unaligned dcache line */ - asm volatile ("dcbf 0,%0" :: "r"(bnd)); /* it's OK */ + asm volatile("dcbf 0,%0" :: "r"(bnd) : "memory"); /* it's OK */ if (siz < dcache_line_size) goto done; siz -= off; } for (bnd = adr + siz; adr < bnd; adr += dcache_line_size) { /* inv() intermediate dcache lines if ever */ - asm volatile ("dcbi 0,%0" :: "r"(adr)); + asm volatile("dcbi 0,%0" :: "r"(adr) : "memory"); } done: - asm volatile ("sync"); + asm volatile("sync" ::: "memory"); } Index: src/sys/arch/bebox/stand/boot/pci.c diff -u src/sys/arch/bebox/stand/boot/pci.c:1.5 src/sys/arch/bebox/stand/boot/pci.c:1.6 --- src/sys/arch/bebox/stand/boot/pci.c:1.5 Thu Oct 14 06:12:54 2010 +++ src/sys/arch/bebox/stand/boot/pci.c Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: pci.c,v 1.5 2010/10/14 06:12:54 kiyohara Exp $ */ +/* $NetBSD: pci.c,v 1.6 2022/02/16 23:49:26 riastradh Exp $ */ /* * Copyright (C) 1995-1997 Gary Thomas (g...@linuxppc.org) @@ -92,7 +92,7 @@ enablePCI(int slot, int io, int mem, int ppci = (u_char *)&PCI_slots[slot].config_addr[CMD]; *ppci = enable; - __asm volatile("eieio"); + __asm volatile("eieio" ::: "memory"); } void Index: src/sys/arch/bebox/stand/boot/vreset.c diff -u src/sys/arch/bebox/stand/boot/vreset.c:1.14 src/sys/arch/bebox/stand/boot/vreset.c:1.15 --- src/sys/arch/bebox/stand/boot/vreset.c:1.14 Fri Dec 12 15:57:30 2014 +++ src/sys/arch/bebox/stand/boot/vreset.c Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: vreset.c,v 1.14 2014/12/12 15:57:30 phx Exp $ */ +/* $NetBSD: vreset.c,v 1.15 2022/02/16 23:49:26 riastradh Exp $ */ /* * Copyright (C) 1995-1997 Gary Thomas (g...@linuxppc.org) @@ -624,7 +624,7 @@ loadFont(u_char *ISA_mem) for (i = 0; i < sizeof(font); i += 16) { for (j = 0; j < 16; j++) { - __asm volatile("eieio"); + __asm volatile("eieio" ::: "memory"); font_page[(2*i)+j] = font[i+j]; } } Index: src/sys/arch/evbppc/pmppc/dev/if_cs_mainbus.c diff -u src/sys/arch/evbppc/pmppc/dev/if_cs_mainbus.c:1.8 src/sys/arch/evbppc/pmppc/dev/if_cs_mainbus.c:1.9 --- src/sys/arch/evbppc/pmppc/dev/if_cs_mainbus.c:1.8 Mon Apr 13 21:18:42 2015 +++ src/sys/arch/evbppc/pmppc/dev/if_cs_mainbus.c Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: if_cs_mainbus.c,v 1.8 2015/04/13 21:18:42 riastradh Exp $ */ +/* $NetBSD: if_cs_mainbus.c,v 1.9 2022/02/16 23:49:26 riastradh Exp $ */ /* * Copyright (c) 2002 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: if_cs_mainbus.c,v 1.8 2015/04/13 21:18:42 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: if_cs_mainbus.c,v 1.9 2022/02/16 23:49:26 riastradh Exp $"); #include <sys/param.h> #include <sys/device.h> @@ -99,7 +99,7 @@ in64(uint a) : "=m"(save), "=m"(*dp) : "m"(u.d) ); - __asm volatile ("eieio; sync"); + __asm volatile("eieio; sync" ::: "memory"); __asm volatile("mtmsr %0" :: "r"(msr)); return (u.i); } @@ -130,7 +130,7 @@ out64(uint a, u_int64_t v) : "=m"(save), "=m"(*dp) : "m"(u.d) ); - __asm volatile ("eieio; sync"); + __asm volatile("eieio; sync" ::: "memory"); __asm volatile("mtmsr %0" :: "r"(msr)); splx(s); } @@ -208,7 +208,7 @@ cs_io_write_multi_2(struct cs_softc *sc, v = bswap16(v); u.i = (u_int64_t)v << 48; __asm volatile("lfd 0,%1\nstfd 0,%0" : "=m"(*dp) : "m"(u.d) ); - __asm volatile ("eieio; sync"); + __asm volatile("eieio; sync" ::: "memory"); } __asm volatile("lfd 0,%0" :: "m"(save)); __asm volatile("mtmsr %0" :: "r"(msr)); Index: src/sys/arch/ibmnws/ibmnws/machdep.c diff -u src/sys/arch/ibmnws/ibmnws/machdep.c:1.18 src/sys/arch/ibmnws/ibmnws/machdep.c:1.19 --- src/sys/arch/ibmnws/ibmnws/machdep.c:1.18 Sat Feb 27 01:31:24 2021 +++ src/sys/arch/ibmnws/ibmnws/machdep.c Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: machdep.c,v 1.18 2021/02/27 01:31:24 thorpej Exp $ */ +/* $NetBSD: machdep.c,v 1.19 2022/02/16 23:49:26 riastradh Exp $ */ /* * Copyright (C) 1995, 1996 Wolfgang Solfrank. @@ -32,7 +32,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.18 2021/02/27 01:31:24 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.19 2022/02/16 23:49:26 riastradh Exp $"); #include "opt_compat_netbsd.h" @@ -249,13 +249,13 @@ halt_sys: reg &= ~1UL; *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92) = reg; - __asm volatile("sync; eieio\n"); + __asm volatile("sync; eieio" ::: "memory"); reg = *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92); reg |= 1; *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92) = reg; - __asm volatile("sync; eieio\n"); + __asm volatile("sync; eieio" ::: "memory"); } for (;;) Index: src/sys/arch/macppc/dev/if_mc.c diff -u src/sys/arch/macppc/dev/if_mc.c:1.27 src/sys/arch/macppc/dev/if_mc.c:1.28 --- src/sys/arch/macppc/dev/if_mc.c:1.27 Fri Mar 5 07:15:53 2021 +++ src/sys/arch/macppc/dev/if_mc.c Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: if_mc.c,v 1.27 2021/03/05 07:15:53 rin Exp $ */ +/* $NetBSD: if_mc.c,v 1.28 2022/02/16 23:49:26 riastradh Exp $ */ /*- * Copyright (c) 1997 David Huang <k...@bga.com> @@ -36,7 +36,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: if_mc.c,v 1.27 2021/03/05 07:15:53 rin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: if_mc.c,v 1.28 2022/02/16 23:49:26 riastradh Exp $"); #include <sys/param.h> #include <sys/device.h> @@ -267,7 +267,7 @@ mc_dmaintr(void *arg) statoff = offset + datalen; DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0); - __asm volatile("eieio"); + __asm volatile("eieio" ::: "memory"); /* flushcache(sc->sc_rxbuf + offset, datalen + 4); */ @@ -282,7 +282,7 @@ mc_dmaintr(void *arg) next: DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); - __asm volatile("eieio"); + __asm volatile("eieio" ::: "memory"); cmd->d_status = 0; cmd->d_resid = 0; sc->sc_tail = i + 1; Index: src/sys/arch/macppc/dev/mediabay.c diff -u src/sys/arch/macppc/dev/mediabay.c:1.27 src/sys/arch/macppc/dev/mediabay.c:1.28 --- src/sys/arch/macppc/dev/mediabay.c:1.27 Sat Jan 22 11:49:16 2022 +++ src/sys/arch/macppc/dev/mediabay.c Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: mediabay.c,v 1.27 2022/01/22 11:49:16 thorpej Exp $ */ +/* $NetBSD: mediabay.c,v 1.28 2022/02/16 23:49:26 riastradh Exp $ */ /*- * Copyright (C) 1999 Tsubai Masanari. All rights reserved. @@ -27,7 +27,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: mediabay.c,v 1.27 2022/01/22 11:49:16 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: mediabay.c,v 1.28 2022/02/16 23:49:26 riastradh Exp $"); #include <sys/param.h> #include <sys/device.h> @@ -213,11 +213,11 @@ mediabay_attach_content(struct mediabay_ delay(50000); out32rb(sc->sc_addr, in32rb(sc->sc_addr) | MBCR_MEDIABAY0_ENABLE); - __asm volatile ("eieio"); + __asm volatile("eieio" ::: "memory"); delay(50000); out32rb(sc->sc_addr, in32rb(sc->sc_addr) & ~0xf); - __asm volatile ("eieio"); + __asm volatile("eieio" ::: "memory"); delay(50000); tsleep(sc, PRI_NONE, "mediabay", hz*1); Index: src/sys/arch/macppc/dev/valkyriefb.c diff -u src/sys/arch/macppc/dev/valkyriefb.c:1.7 src/sys/arch/macppc/dev/valkyriefb.c:1.8 --- src/sys/arch/macppc/dev/valkyriefb.c:1.7 Sat Aug 7 16:18:58 2021 +++ src/sys/arch/macppc/dev/valkyriefb.c Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: valkyriefb.c,v 1.7 2021/08/07 16:18:58 thorpej Exp $ */ +/* $NetBSD: valkyriefb.c,v 1.8 2022/02/16 23:49:26 riastradh Exp $ */ /* * Copyright (c) 2012 Michael Lorenz @@ -32,7 +32,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: valkyriefb.c,v 1.7 2021/08/07 16:18:58 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: valkyriefb.c,v 1.8 2022/02/16 23:49:26 riastradh Exp $"); #include <sys/param.h> #include <sys/systm.h> @@ -161,7 +161,7 @@ static inline void valkyriefb_write_reg(struct valkyriefb_softc *sc, int reg, uint8_t val) { *(sc->sc_base + VAL_REGS_OFFSET + reg) = val; - __asm("eieio; sync;"); + __asm volatile("eieio; sync;" ::: "memory"); } #ifdef VALKYRIEFB_DEBUG @@ -177,13 +177,13 @@ valkyriefb_write_cmap(struct valkyriefb_ int reg, uint8_t r, uint8_t g, uint8_t b) { *(sc->sc_base + VAL_CMAP_OFFSET + VAL_CMAP_ADDR) = reg; - __asm("eieio; sync;"); + __asm volatile("eieio; sync;" ::: "memory"); *(sc->sc_base + VAL_CMAP_OFFSET + VAL_CMAP_LUT) = r; - __asm("eieio; sync;"); + __asm volatile("eieio; sync;" ::: "memory"); *(sc->sc_base + VAL_CMAP_OFFSET + VAL_CMAP_LUT) = g; - __asm("eieio; sync;"); + __asm volatile("eieio; sync;" ::: "memory"); *(sc->sc_base + VAL_CMAP_OFFSET + VAL_CMAP_LUT) = b; - __asm("eieio; sync;"); + __asm volatile("eieio; sync;" ::: "memory"); } static int Index: src/sys/arch/macppc/dev/zs.c diff -u src/sys/arch/macppc/dev/zs.c:1.55 src/sys/arch/macppc/dev/zs.c:1.56 --- src/sys/arch/macppc/dev/zs.c:1.55 Sun Feb 13 12:24:24 2022 +++ src/sys/arch/macppc/dev/zs.c Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: zs.c,v 1.55 2022/02/13 12:24:24 martin Exp $ */ +/* $NetBSD: zs.c,v 1.56 2022/02/16 23:49:26 riastradh Exp $ */ /* * Copyright (c) 1996, 1998 Bill Studenmund @@ -49,7 +49,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.55 2022/02/13 12:24:24 martin Exp $"); +__KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.56 2022/02/16 23:49:26 riastradh Exp $"); #include "opt_ddb.h" #include "opt_kgdb.h" @@ -524,7 +524,7 @@ zs_dma_setup(struct zs_chanstate *cs, vo DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); - __asm volatile("eieio"); + __asm volatile("eieio" ::: "memory"); dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]); } Index: src/sys/arch/powerpc/include/pio.h diff -u src/sys/arch/powerpc/include/pio.h:1.9 src/sys/arch/powerpc/include/pio.h:1.10 --- src/sys/arch/powerpc/include/pio.h:1.9 Mon Jul 6 10:31:23 2020 +++ src/sys/arch/powerpc/include/pio.h Wed Feb 16 23:49:26 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: pio.h,v 1.9 2020/07/06 10:31:23 rin Exp $ */ +/* $NetBSD: pio.h,v 1.10 2022/02/16 23:49:26 riastradh Exp $ */ /* $OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ */ /* @@ -46,9 +46,9 @@ #if defined(PPC_IBM4XX) && !defined(PPC_IBM440) /* eieio is implemented as sync */ -#define IO_BARRIER() __asm volatile("sync") +#define IO_BARRIER() __asm volatile("sync" ::: "memory") #else -#define IO_BARRIER() __asm volatile("eieio; sync") +#define IO_BARRIER() __asm volatile("eieio; sync" ::: "memory") #endif static __inline void __outb(volatile uint8_t *a, uint8_t v); Index: src/sys/arch/powerpc/oea/pmap.c diff -u src/sys/arch/powerpc/oea/pmap.c:1.108 src/sys/arch/powerpc/oea/pmap.c:1.109 --- src/sys/arch/powerpc/oea/pmap.c:1.108 Wed Feb 16 23:31:13 2022 +++ src/sys/arch/powerpc/oea/pmap.c Wed Feb 16 23:49:27 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.108 2022/02/16 23:31:13 riastradh Exp $ */ +/* $NetBSD: pmap.c,v 1.109 2022/02/16 23:49:27 riastradh Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. * All rights reserved. @@ -63,7 +63,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.108 2022/02/16 23:31:13 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.109 2022/02/16 23:49:27 riastradh Exp $"); #define PMAP_NOOPNAMES @@ -479,19 +479,19 @@ extern struct evcnt pmap_evcnt_idlezeroe #define PMAPCOUNT2(ev) ((void) 0) #endif -#define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va)) +#define TLBIE(va) __asm volatile("tlbie %0" :: "r"(va) : "memory") /* XXXSL: this needs to be moved to assembler */ -#define TLBIEL(va) __asm __volatile("tlbie %0" :: "r"(va)) +#define TLBIEL(va) __asm volatile("tlbie %0" :: "r"(va) : "memory") #ifdef MD_TLBSYNC #define TLBSYNC() MD_TLBSYNC() #else -#define TLBSYNC() __asm volatile("tlbsync") +#define TLBSYNC() __asm volatile("tlbsync" ::: "memory") #endif -#define SYNC() __asm volatile("sync") -#define EIEIO() __asm volatile("eieio") -#define DCBST(va) __asm __volatile("dcbst 0,%0" :: "r"(va)) +#define SYNC() __asm volatile("sync" ::: "memory") +#define EIEIO() __asm volatile("eieio" ::: "memory") +#define DCBST(va) __asm volatile("dcbst 0,%0" :: "r"(va) : "memory") #define MFMSR() mfmsr() #define MTMSR(psl) mtmsr(psl) #define MFPVR() mfpvr() @@ -3526,12 +3526,16 @@ pmap_bootstrap2(void) #endif /* PMAP_OEA || PMAP_OEA64_BRIDGE */ #if defined(PMAP_OEA) - __asm volatile("sync; mtsdr1 %0; isync" - :: "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10))); + __asm volatile("sync; mtsdr1 %0; isync" + : + : "r"((uintptr_t)pmap_pteg_table | (pmap_pteg_mask >> 10)) + : "memory"); #elif defined(PMAP_OEA64) || defined(PMAP_OEA64_BRIDGE) - __asm __volatile("sync; mtsdr1 %0; isync" - :: "r"((uintptr_t)pmap_pteg_table | - (32 - __builtin_clz(pmap_pteg_mask >> 11)))); + __asm volatile("sync; mtsdr1 %0; isync" + : + : "r"((uintptr_t)pmap_pteg_table | + (32 - __builtin_clz(pmap_pteg_mask >> 11))) + : "memory"); #endif tlbia(); Index: src/sys/arch/powerpc/pic/intr.c diff -u src/sys/arch/powerpc/pic/intr.c:1.33 src/sys/arch/powerpc/pic/intr.c:1.34 --- src/sys/arch/powerpc/pic/intr.c:1.33 Tue Mar 23 08:07:23 2021 +++ src/sys/arch/powerpc/pic/intr.c Wed Feb 16 23:49:27 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: intr.c,v 1.33 2021/03/23 08:07:23 skrll Exp $ */ +/* $NetBSD: intr.c,v 1.34 2022/02/16 23:49:27 riastradh Exp $ */ /*- * Copyright (c) 2007 Michael Lorenz @@ -29,7 +29,7 @@ #define __INTR_PRIVATE #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.33 2021/03/23 08:07:23 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.34 2022/02/16 23:49:27 riastradh Exp $"); #ifdef _KERNEL_OPT #include "opt_interrupt.h" @@ -65,9 +65,9 @@ __KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.3 #if defined(PPC_IBM4XX) && !defined(PPC_IBM440) /* eieio is implemented as sync */ -#define REORDER_PROTECT() __asm volatile("sync") +#define REORDER_PROTECT() __asm volatile("sync" ::: "memory") #else -#define REORDER_PROTECT() __asm volatile("sync; eieio") +#define REORDER_PROTECT() __asm volatile("sync; eieio" ::: "memory") #endif struct pic_ops *pics[MAX_PICS]; Index: src/sys/arch/powerpc/powerpc/bus_dma.c diff -u src/sys/arch/powerpc/powerpc/bus_dma.c:1.53 src/sys/arch/powerpc/powerpc/bus_dma.c:1.54 --- src/sys/arch/powerpc/powerpc/bus_dma.c:1.53 Wed Feb 16 23:30:52 2022 +++ src/sys/arch/powerpc/powerpc/bus_dma.c Wed Feb 16 23:49:27 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: bus_dma.c,v 1.53 2022/02/16 23:30:52 riastradh Exp $ */ +/* $NetBSD: bus_dma.c,v 1.54 2022/02/16 23:49:27 riastradh Exp $ */ /*- * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. @@ -33,7 +33,7 @@ #define _POWERPC_BUS_DMA_PRIVATE #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.53 2022/02/16 23:30:52 riastradh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.54 2022/02/16 23:49:27 riastradh Exp $"); #ifdef _KERNEL_OPT #include "opt_ppcarch.h" @@ -53,15 +53,15 @@ __KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v #include <uvm/uvm_physseg.h> #if defined(PPC_BOOKE) -#define EIEIO __asm volatile("mbar\t0") -#define SYNC __asm volatile("msync") +#define EIEIO __asm volatile("mbar\t0" ::: "memory") +#define SYNC __asm volatile("msync" ::: "memory") #elif defined(PPC_IBM4XX) && !defined(PPC_IBM440) /* eieio is implemented as sync */ -#define EIEIO __asm volatile("eieio") +#define EIEIO __asm volatile("eieio" ::: "memory") #define SYNC /* nothing */ #else -#define EIEIO __asm volatile("eieio") -#define SYNC __asm volatile("sync") +#define EIEIO __asm volatile("eieio" ::: "memory") +#define SYNC __asm volatile("sync" ::: "memory") #endif int _bus_dmamap_load_buffer (bus_dma_tag_t, bus_dmamap_t, void *, @@ -72,7 +72,7 @@ dcbst(paddr_t pa, long len, int dcache_l { paddr_t epa; for (epa = pa + len; pa < epa; pa += dcache_line_size) - __asm volatile("dcbst 0,%0" :: "r"(pa)); + __asm volatile("dcbst 0,%0" :: "r"(pa) : "memory"); } static inline void @@ -80,7 +80,7 @@ dcbi(paddr_t pa, long len, int dcache_li { paddr_t epa; for (epa = pa + len; pa < epa; pa += dcache_line_size) - __asm volatile("dcbi 0,%0" :: "r"(pa)); + __asm volatile("dcbi 0,%0" :: "r"(pa) : "memory"); } static inline void @@ -88,7 +88,7 @@ dcbf(paddr_t pa, long len, int dcache_li { paddr_t epa; for (epa = pa + len; pa < epa; pa += dcache_line_size) - __asm volatile("dcbf 0,%0" :: "r"(pa)); + __asm volatile("dcbf 0,%0" :: "r"(pa) : "memory"); } /* Index: src/sys/arch/prep/stand/boot/io.c diff -u src/sys/arch/prep/stand/boot/io.c:1.5 src/sys/arch/prep/stand/boot/io.c:1.6 --- src/sys/arch/prep/stand/boot/io.c:1.5 Sat May 19 14:40:13 2012 +++ src/sys/arch/prep/stand/boot/io.c Wed Feb 16 23:49:27 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: io.c,v 1.5 2012/05/19 14:40:13 kiyohara Exp $ */ +/* $NetBSD: io.c,v 1.6 2022/02/16 23:49:27 riastradh Exp $ */ /*- * Copyright (C) 1995-1997 Gary Thomas (g...@linuxppc.org) @@ -106,10 +106,10 @@ _wbinv(uint32_t adr, uint32_t siz) { uint32_t bnd; - asm volatile("eieio"); + asm volatile("eieio" ::: "memory"); for (bnd = adr + siz; adr < bnd; adr += dcache_line_size) - asm volatile ("dcbf 0,%0" :: "r"(adr)); - asm volatile ("sync"); + asm volatile("dcbf 0,%0" :: "r"(adr) : "memory"); + asm volatile("sync" ::: "memory"); } void @@ -120,10 +120,10 @@ _inv(uint32_t adr, uint32_t siz) off = adr & (dcache_line_size - 1); adr -= off; siz += off; - asm volatile ("eieio"); + asm volatile("eieio" ::: "memory"); if (off != 0) { /* wbinv() leading unaligned dcache line */ - asm volatile ("dcbf 0,%0" :: "r"(adr)); + asm volatile("dcbf 0,%0" :: "r"(adr) : "memory"); if (siz < dcache_line_size) goto done; adr += dcache_line_size; @@ -133,17 +133,17 @@ _inv(uint32_t adr, uint32_t siz) off = bnd & (dcache_line_size - 1); if (off != 0) { /* wbinv() trailing unaligned dcache line */ - asm volatile ("dcbf 0,%0" :: "r"(bnd)); /* it's OK */ + asm volatile("dcbf 0,%0" :: "r"(bnd) : "memory"); /* it's OK */ if (siz < dcache_line_size) goto done; siz -= off; } for (bnd = adr + siz; adr < bnd; adr += dcache_line_size) { /* inv() intermediate dcache lines if ever */ - asm volatile ("dcbi 0,%0" :: "r"(adr)); + asm volatile("dcbi 0,%0" :: "r"(adr) : "memory"); } done: - asm volatile ("sync"); + asm volatile("sync" ::: "memory"); } u_long Index: src/sys/arch/prep/stand/boot/pci.c diff -u src/sys/arch/prep/stand/boot/pci.c:1.2 src/sys/arch/prep/stand/boot/pci.c:1.3 --- src/sys/arch/prep/stand/boot/pci.c:1.2 Thu Apr 3 23:49:47 2014 +++ src/sys/arch/prep/stand/boot/pci.c Wed Feb 16 23:49:27 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: pci.c,v 1.2 2014/04/03 23:49:47 mrg Exp $ */ +/* $NetBSD: pci.c,v 1.3 2022/02/16 23:49:27 riastradh Exp $ */ /* * Copyright (C) 1995-1997 Gary Thomas (g...@linuxppc.org) @@ -94,7 +94,7 @@ enablePCI(int slot, int io, int mem, int ppci = (u_char *)&PCI_slots[slot].config_addr[CMD]; *ppci = enable; - __asm volatile("eieio"); + __asm volatile("eieio" ::: "memory"); } int @@ -146,7 +146,7 @@ unlockVideo(int slot) ppci[0x12] = 0x00000; ppci[0x13] = 0x00000; #endif - __asm__ volatile("eieio"); + __asm__ volatile("eieio" ::: "memory"); outb(0x3d4, 0x11); outb(0x3d5, 0x0e); /* unlock CR0-CR7 */ Index: src/sys/arch/prep/stand/boot/vreset.c diff -u src/sys/arch/prep/stand/boot/vreset.c:1.9 src/sys/arch/prep/stand/boot/vreset.c:1.10 --- src/sys/arch/prep/stand/boot/vreset.c:1.9 Thu Apr 3 23:49:47 2014 +++ src/sys/arch/prep/stand/boot/vreset.c Wed Feb 16 23:49:27 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: vreset.c,v 1.9 2014/04/03 23:49:47 mrg Exp $ */ +/* $NetBSD: vreset.c,v 1.10 2022/02/16 23:49:27 riastradh Exp $ */ /*- * Copyright (c) 2006 The NetBSD Foundation, Inc. * All rights reserved. @@ -307,7 +307,7 @@ load_font(u_int8_t *ISA_mem) for (i = 0; i < sizeof(font); i += 16) { for (j = 0; j < 16; j++) { - __asm__ volatile("eieio"); + __asm__ volatile("eieio" ::: "memory"); font_page[(2*i)+j] = font[i+j]; } } Index: src/sys/arch/rs6000/stand/boot/boot.c diff -u src/sys/arch/rs6000/stand/boot/boot.c:1.6 src/sys/arch/rs6000/stand/boot/boot.c:1.7 --- src/sys/arch/rs6000/stand/boot/boot.c:1.6 Mon Feb 24 12:20:29 2020 +++ src/sys/arch/rs6000/stand/boot/boot.c Wed Feb 16 23:49:27 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: boot.c,v 1.6 2020/02/24 12:20:29 rin Exp $ */ +/* $NetBSD: boot.c,v 1.7 2022/02/16 23:49:27 riastradh Exp $ */ /* * Copyright (C) 1995, 1996 Wolfgang Solfrank. @@ -127,14 +127,13 @@ setled(uint32_t val) __asm volatile ("isync"); *(volatile uint32_t *)0xFF600300 = val; - __asm volatile ("eieio"); + __asm volatile ("eieio" ::: "memory"); __asm volatile ("isync"); /* put back to normal */ __asm volatile ("mtmsr %0" : : "r"(savemsr)); __asm volatile ("isync"); #endif /* NOTYET */ - #endif } Index: src/sys/arch/sandpoint/stand/altboot/brdsetup.c diff -u src/sys/arch/sandpoint/stand/altboot/brdsetup.c:1.40 src/sys/arch/sandpoint/stand/altboot/brdsetup.c:1.41 --- src/sys/arch/sandpoint/stand/altboot/brdsetup.c:1.40 Mon Aug 9 20:49:09 2021 +++ src/sys/arch/sandpoint/stand/altboot/brdsetup.c Wed Feb 16 23:49:27 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: brdsetup.c,v 1.40 2021/08/09 20:49:09 andvar Exp $ */ +/* $NetBSD: brdsetup.c,v 1.41 2022/02/16 23:49:27 riastradh Exp $ */ /*- * Copyright (c) 2008 The NetBSD Foundation, Inc. @@ -1034,7 +1034,18 @@ delay(unsigned n) tb += ((uint64_t)n * 1000 + ns_per_tick - 1) / ns_per_tick; tbh = tb >> 32; tbl = tb; - asm volatile ("1: mftbu %0; cmpw %0,%1; blt 1b; bgt 2f; mftb %0; cmpw 0, %0,%2; blt 1b; 2:" : "=&r"(scratch) : "r"(tbh), "r"(tbl)); + asm volatile( + "1: mftbu %0;" + " cmpw %0,%1;" + " blt 1b;" + " bgt 2f;" + " mftb %0;" + " cmpw 0, %0,%2;" + " blt 1b;" + "2:" + : "=&r"(scratch) + : "r"(tbh), "r"(tbl) + : "cc"); } void @@ -1042,10 +1053,10 @@ _wb(uint32_t adr, uint32_t siz) { uint32_t bnd; - asm volatile("eieio"); + asm volatile("eieio" ::: "memory"); for (bnd = adr + siz; adr < bnd; adr += dcache_line_size) - asm volatile ("dcbst 0,%0" :: "r"(adr)); - asm volatile ("sync"); + asm volatile("dcbst 0,%0" :: "r"(adr) : "memory"); + asm volatile("sync" ::: "memory"); } void @@ -1053,10 +1064,10 @@ _wbinv(uint32_t adr, uint32_t siz) { uint32_t bnd; - asm volatile("eieio"); + asm volatile("eieio" ::: "memory"); for (bnd = adr + siz; adr < bnd; adr += dcache_line_size) - asm volatile ("dcbf 0,%0" :: "r"(adr)); - asm volatile ("sync"); + asm volatile("dcbf 0,%0" :: "r"(adr) : "memory"); + asm volatile("sync"); } void @@ -1067,10 +1078,10 @@ _inv(uint32_t adr, uint32_t siz) off = adr & (dcache_line_size - 1); adr -= off; siz += off; - asm volatile ("eieio"); + asm volatile("eieio" ::: "memory"); if (off != 0) { /* wbinv() leading unaligned dcache line */ - asm volatile ("dcbf 0,%0" :: "r"(adr)); + asm volatile("dcbf 0,%0" :: "r"(adr) : "memory"); if (siz < dcache_line_size) goto done; adr += dcache_line_size; @@ -1080,17 +1091,17 @@ _inv(uint32_t adr, uint32_t siz) off = bnd & (dcache_line_size - 1); if (off != 0) { /* wbinv() trailing unaligned dcache line */ - asm volatile ("dcbf 0,%0" :: "r"(bnd)); /* it's OK */ + asm volatile("dcbf 0,%0" :: "r"(bnd) : "memory"); /* it's OK */ if (siz < dcache_line_size) goto done; siz -= off; } for (bnd = adr + siz; adr < bnd; adr += dcache_line_size) { /* inv() intermediate dcache lines if ever */ - asm volatile ("dcbi 0,%0" :: "r"(adr)); + asm volatile("dcbi 0,%0" :: "r"(adr) : "memory"); } done: - asm volatile ("sync"); + asm volatile("sync" ::: "memory"); } static inline uint32_t @@ -1124,7 +1135,7 @@ mftb(void) uint64_t tb; asm ("1: mftbu %0; mftb %0+1; mftbu %1; cmpw %0,%1; bne 1b" - : "=r"(tb), "=r"(scratch)); + : "=r"(tb), "=r"(scratch) :: "cc"); return tb; }