Module Name: src
Committed By: andvar
Date: Sun Mar 13 17:50:55 UTC 2022
Modified Files:
src/lib/libc/sys: sa_enable.2 sa_yield.2
src/sys/arch/atari/atari: machdep.c
src/sys/arch/mips/mips: cache.c locore_mips1.S mipsX_subr.S trap.c
src/sys/arch/powerpc/powerpc: compat_13_machdep.c compat_16_machdep.c
src/sys/dev/marvell: if_mvxpevar.h mvxpbmvar.h
src/sys/netbt: l2cap_signal.c
Log Message:
s/hander/handler/ and s/hader/header/ in comments and documentation.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/lib/libc/sys/sa_enable.2 \
src/lib/libc/sys/sa_yield.2
cvs rdiff -u -r1.185 -r1.186 src/sys/arch/atari/atari/machdep.c
cvs rdiff -u -r1.68 -r1.69 src/sys/arch/mips/mips/cache.c
cvs rdiff -u -r1.96 -r1.97 src/sys/arch/mips/mips/locore_mips1.S
cvs rdiff -u -r1.113 -r1.114 src/sys/arch/mips/mips/mipsX_subr.S
cvs rdiff -u -r1.261 -r1.262 src/sys/arch/mips/mips/trap.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/powerpc/powerpc/compat_13_machdep.c
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/powerpc/powerpc/compat_16_machdep.c
cvs rdiff -u -r1.7 -r1.8 src/sys/dev/marvell/if_mvxpevar.h
cvs rdiff -u -r1.3 -r1.4 src/sys/dev/marvell/mvxpbmvar.h
cvs rdiff -u -r1.20 -r1.21 src/sys/netbt/l2cap_signal.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/lib/libc/sys/sa_enable.2
diff -u src/lib/libc/sys/sa_enable.2:1.4 src/lib/libc/sys/sa_enable.2:1.5
--- src/lib/libc/sys/sa_enable.2:1.4 Sun Mar 14 23:05:09 2004
+++ src/lib/libc/sys/sa_enable.2 Sun Mar 13 17:50:54 2022
@@ -1,4 +1,4 @@
-.\" $NetBSD: sa_enable.2,v 1.4 2004/03/14 23:05:09 yamt Exp $
+.\" $NetBSD: sa_enable.2,v 1.5 2022/03/13 17:50:54 andvar Exp $
.\"
.\" Copyright (c)2004 YAMAMOTO Takashi,
.\" All rights reserved.
@@ -54,7 +54,7 @@ beforehand.
On success,
.Fn sa_enable
will not return to userland in the normal way.
-It returns into the upcall hander with an
+It returns into the upcall handler with an
.Dv SA_UPCALL_NEWPROC
upcall.
Otherwise, a value of \-1 is returned and
Index: src/lib/libc/sys/sa_yield.2
diff -u src/lib/libc/sys/sa_yield.2:1.4 src/lib/libc/sys/sa_yield.2:1.5
--- src/lib/libc/sys/sa_yield.2:1.4 Sun May 9 11:28:58 2004
+++ src/lib/libc/sys/sa_yield.2 Sun Mar 13 17:50:54 2022
@@ -1,4 +1,4 @@
-.\" $NetBSD: sa_yield.2,v 1.4 2004/05/09 11:28:58 yamt Exp $
+.\" $NetBSD: sa_yield.2,v 1.5 2022/03/13 17:50:54 andvar Exp $
.\"
.\" Copyright (c)2004 YAMAMOTO Takashi,
.\" All rights reserved.
@@ -54,7 +54,7 @@ beforehand.
On success,
.Fn sa_yield
will not return to userland in the normal way.
-It returns into an upcall hander with an upcall.
+It returns into an upcall handler with an upcall.
Otherwise, a value of \-1 is returned and
.Va errno
is set to indicate the error.
Index: src/sys/arch/atari/atari/machdep.c
diff -u src/sys/arch/atari/atari/machdep.c:1.185 src/sys/arch/atari/atari/machdep.c:1.186
--- src/sys/arch/atari/atari/machdep.c:1.185 Sat Oct 9 20:00:41 2021
+++ src/sys/arch/atari/atari/machdep.c Sun Mar 13 17:50:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.185 2021/10/09 20:00:41 tsutsui Exp $ */
+/* $NetBSD: machdep.c,v 1.186 2022/03/13 17:50:55 andvar Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.185 2021/10/09 20:00:41 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.186 2022/03/13 17:50:55 andvar Exp $");
#include "opt_ddb.h"
#include "opt_compat_netbsd.h"
@@ -656,7 +656,7 @@ add_sicallback(void (*function)(void *,
* happen immediately, or after returning to a safe enough level.
*
* XXX:
- * According to <machine/scu.h> and lev1intr() hander in locore.s,
+ * According to <machine/scu.h> and lev1intr() handler in locore.s,
* at least _ATARIHW_ machines (ATARITT and HADES?) seem to have
* some hardware support which can initiate real hardware interrupt
* at ipl 1 for software interrupt. But as per <machine/mtpr.h>,
Index: src/sys/arch/mips/mips/cache.c
diff -u src/sys/arch/mips/mips/cache.c:1.68 src/sys/arch/mips/mips/cache.c:1.69
--- src/sys/arch/mips/mips/cache.c:1.68 Sun Aug 2 06:51:47 2020
+++ src/sys/arch/mips/mips/cache.c Sun Mar 13 17:50:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: cache.c,v 1.68 2020/08/02 06:51:47 skrll Exp $ */
+/* $NetBSD: cache.c,v 1.69 2022/03/13 17:50:55 andvar Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -68,7 +68,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.68 2020/08/02 06:51:47 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.69 2022/03/13 17:50:55 andvar Exp $");
#include "opt_cputype.h"
#include "opt_mips_cache.h"
@@ -711,7 +711,7 @@ primary_cache_is_2way:
* virtual alias on its 8KB or 16KB primary cache
* which has only 1 or 2 bit valid PIdx in 4KB page.
* Actual primary cache size is ignored wrt VCE
- * and virtual aliases are resolved by the VCE hander,
+ * and virtual aliases are resolved by the VCE handler,
* but it's still worth to avoid unnecessary VCE by
* setting alias mask and prefer mask to 32K, though
* some other possible aliases (maybe caused by KSEG0
Index: src/sys/arch/mips/mips/locore_mips1.S
diff -u src/sys/arch/mips/mips/locore_mips1.S:1.96 src/sys/arch/mips/mips/locore_mips1.S:1.97
--- src/sys/arch/mips/mips/locore_mips1.S:1.96 Sun Sep 19 10:34:09 2021
+++ src/sys/arch/mips/mips/locore_mips1.S Sun Mar 13 17:50:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: locore_mips1.S,v 1.96 2021/09/19 10:34:09 andvar Exp $ */
+/* $NetBSD: locore_mips1.S,v 1.97 2022/03/13 17:50:55 andvar Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -57,7 +57,7 @@
#include <mips/asm.h>
#include <mips/cpuregs.h>
-RCSID("$NetBSD: locore_mips1.S,v 1.96 2021/09/19 10:34:09 andvar Exp $")
+RCSID("$NetBSD: locore_mips1.S,v 1.97 2022/03/13 17:50:55 andvar Exp $")
#include "assym.h"
@@ -1086,7 +1086,7 @@ END(MIPSX(tlb_mod_exception))
#endif
/*
- * Mark where code entreed from exception hander jumptable
+ * Mark where code entreed from exception handler jumptable
* ends, for stack traceback code.
*/
Index: src/sys/arch/mips/mips/mipsX_subr.S
diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.113 src/sys/arch/mips/mips/mipsX_subr.S:1.114
--- src/sys/arch/mips/mips/mipsX_subr.S:1.113 Tue Feb 16 06:06:58 2021
+++ src/sys/arch/mips/mips/mipsX_subr.S Sun Mar 13 17:50:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: mipsX_subr.S,v 1.113 2021/02/16 06:06:58 simonb Exp $ */
+/* $NetBSD: mipsX_subr.S,v 1.114 2022/03/13 17:50:55 andvar Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -117,7 +117,7 @@
*/
#include <mips/asm.h>
-RCSID("$NetBSD: mipsX_subr.S,v 1.113 2021/02/16 06:06:58 simonb Exp $")
+RCSID("$NetBSD: mipsX_subr.S,v 1.114 2022/03/13 17:50:55 andvar Exp $")
#include "opt_cputype.h"
#include "opt_ddb.h"
@@ -2009,7 +2009,7 @@ END(MIPSX(kern_tlb_invalid_exception))
#endif /* (PGSHIFT & 1) == 0 */
/*
- * Mark where code entered from exception hander jumptable
+ * Mark where code entered from exception handler jumptable
* ends, for stack traceback code.
*/
Index: src/sys/arch/mips/mips/trap.c
diff -u src/sys/arch/mips/mips/trap.c:1.261 src/sys/arch/mips/mips/trap.c:1.262
--- src/sys/arch/mips/mips/trap.c:1.261 Wed Apr 7 02:59:01 2021
+++ src/sys/arch/mips/mips/trap.c Sun Mar 13 17:50:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.261 2021/04/07 02:59:01 simonb Exp $ */
+/* $NetBSD: trap.c,v 1.262 2022/03/13 17:50:55 andvar Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.261 2021/04/07 02:59:01 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.262 2022/03/13 17:50:55 andvar Exp $");
#include "opt_cputype.h" /* which mips CPU levels do we support? */
#include "opt_ddb.h"
@@ -347,7 +347,7 @@ trap(uint32_t status, uint32_t cause, va
* Since we don't block interrupts here,
* this can legitimately happen if we get
* a TLB miss that's serviced in an interrupt
- * hander that happens to randomly evict the
+ * handler that happens to randomly evict the
* TLB entry we're concerned about.
*/
printf("pmap_tlb_update_addr(%p,%#"
Index: src/sys/arch/powerpc/powerpc/compat_13_machdep.c
diff -u src/sys/arch/powerpc/powerpc/compat_13_machdep.c:1.21 src/sys/arch/powerpc/powerpc/compat_13_machdep.c:1.22
--- src/sys/arch/powerpc/powerpc/compat_13_machdep.c:1.21 Tue Dec 13 11:03:52 2011
+++ src/sys/arch/powerpc/powerpc/compat_13_machdep.c Sun Mar 13 17:50:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: compat_13_machdep.c,v 1.21 2011/12/13 11:03:52 kiyohara Exp $ */
+/* $NetBSD: compat_13_machdep.c,v 1.22 2022/03/13 17:50:55 andvar Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: compat_13_machdep.c,v 1.21 2011/12/13 11:03:52 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: compat_13_machdep.c,v 1.22 2022/03/13 17:50:55 andvar Exp $");
#ifdef _KERNEL_OPT
#include "opt_ppcarch.h"
@@ -69,7 +69,7 @@ compat_13_sys_sigreturn(struct lwp *l,
/*
* The trampoline hands us the context.
* It is unsafe to keep track of it ourselves, in the event that a
- * program jumps out of a signal hander.
+ * program jumps out of a signal handler.
*/
if ((error = copyin(SCARG(uap, sigcntxp), &sc, sizeof sc)) != 0)
return (error);
Index: src/sys/arch/powerpc/powerpc/compat_16_machdep.c
diff -u src/sys/arch/powerpc/powerpc/compat_16_machdep.c:1.22 src/sys/arch/powerpc/powerpc/compat_16_machdep.c:1.23
--- src/sys/arch/powerpc/powerpc/compat_16_machdep.c:1.22 Sat Oct 30 19:44:56 2021
+++ src/sys/arch/powerpc/powerpc/compat_16_machdep.c Sun Mar 13 17:50:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: compat_16_machdep.c,v 1.22 2021/10/30 19:44:56 thorpej Exp $ */
+/* $NetBSD: compat_16_machdep.c,v 1.23 2022/03/13 17:50:55 andvar Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: compat_16_machdep.c,v 1.22 2021/10/30 19:44:56 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: compat_16_machdep.c,v 1.23 2022/03/13 17:50:55 andvar Exp $");
#ifdef _KERNEL_OPT
#include "opt_altivec.h"
@@ -198,7 +198,7 @@ compat_16_sys___sigreturn14(struct lwp *
/*
* The trampoline hands us the context.
* It is unsafe to keep track of it ourselves, in the event that a
- * program jumps out of a signal hander.
+ * program jumps out of a signal handler.
*/
if ((error = copyin(SCARG(uap, sigcntxp), &sc, sizeof sc)) != 0)
return (error);
Index: src/sys/dev/marvell/if_mvxpevar.h
diff -u src/sys/dev/marvell/if_mvxpevar.h:1.7 src/sys/dev/marvell/if_mvxpevar.h:1.8
--- src/sys/dev/marvell/if_mvxpevar.h:1.7 Wed Feb 16 22:00:56 2022
+++ src/sys/dev/marvell/if_mvxpevar.h Sun Mar 13 17:50:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: if_mvxpevar.h,v 1.7 2022/02/16 22:00:56 andvar Exp $ */
+/* $NetBSD: if_mvxpevar.h,v 1.8 2022/03/13 17:50:55 andvar Exp $ */
/*
* Copyright (c) 2015 Internet Initiative Japan Inc.
* All rights reserved.
@@ -393,8 +393,8 @@ struct mvxpe_softc {
/*
* sc_mtx must be held by interface functions to/from
- * other frameworks. interrupt hander, sysctl hander,
- * ioctl hander, and so on.
+ * other frameworks. interrupt handler, sysctl handler,
+ * ioctl handler, and so on.
*/
kmutex_t sc_mtx;
Index: src/sys/dev/marvell/mvxpbmvar.h
diff -u src/sys/dev/marvell/mvxpbmvar.h:1.3 src/sys/dev/marvell/mvxpbmvar.h:1.4
--- src/sys/dev/marvell/mvxpbmvar.h:1.3 Sat Sep 11 21:30:46 2021
+++ src/sys/dev/marvell/mvxpbmvar.h Sun Mar 13 17:50:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: mvxpbmvar.h,v 1.3 2021/09/11 21:30:46 andvar Exp $ */
+/* $NetBSD: mvxpbmvar.h,v 1.4 2022/03/13 17:50:55 andvar Exp $ */
/*
* Copyright (c) 2015 Internet Initiative Japan Inc.
* All rights reserved.
@@ -100,7 +100,7 @@ struct mvxpbm_softc {
size_t sc_slotsize; /* size of bm_slots include header */
uint32_t sc_chunk_count; /* number of chunks */
size_t sc_chunk_size; /* size of packet buffer */
- size_t sc_chunk_header_size; /* size of hader + padding */
+ size_t sc_chunk_header_size; /* size of header + padding */
off_t sc_chunk_packet_offset; /* allocate m_leading_space */
/* for software based management */
Index: src/sys/netbt/l2cap_signal.c
diff -u src/sys/netbt/l2cap_signal.c:1.20 src/sys/netbt/l2cap_signal.c:1.21
--- src/sys/netbt/l2cap_signal.c:1.20 Sat Feb 29 11:40:06 2020
+++ src/sys/netbt/l2cap_signal.c Sun Mar 13 17:50:55 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: l2cap_signal.c,v 1.20 2020/02/29 11:40:06 maxv Exp $ */
+/* $NetBSD: l2cap_signal.c,v 1.21 2022/03/13 17:50:55 andvar Exp $ */
/*-
* Copyright (c) 2005 Iain Hibbert.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: l2cap_signal.c,v 1.20 2020/02/29 11:40:06 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: l2cap_signal.c,v 1.21 2022/03/13 17:50:55 andvar Exp $");
#include <sys/param.h>
#include <sys/kernel.h>
@@ -64,7 +64,7 @@ static void l2cap_qos_htob(void *, l2cap
/*
* process incoming signal packets (CID 0x0001). Can contain multiple
- * requests/responses. The signal hander should clear the command from
+ * requests/responses. The signal handler should clear the command from
* the mbuf before returning.
*/
void
