Module Name: src
Committed By: martin
Date: Sat Mar 26 16:22:50 UTC 2022
Modified Files:
src/tests/lib/libc/sys: t_ptrace_core_wait.h
Log Message:
Add sparc* to the list of architectures that need an explicit address
with PT_CONTINUE in this test.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/tests/lib/libc/sys/t_ptrace_core_wait.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/tests/lib/libc/sys/t_ptrace_core_wait.h
diff -u src/tests/lib/libc/sys/t_ptrace_core_wait.h:1.4 src/tests/lib/libc/sys/t_ptrace_core_wait.h:1.5
--- src/tests/lib/libc/sys/t_ptrace_core_wait.h:1.4 Sat Jul 24 08:39:54 2021
+++ src/tests/lib/libc/sys/t_ptrace_core_wait.h Sat Mar 26 16:22:50 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: t_ptrace_core_wait.h,v 1.4 2021/07/24 08:39:54 rin Exp $ */
+/* $NetBSD: t_ptrace_core_wait.h,v 1.5 2022/03/26 16:22:50 martin Exp $ */
/*-
* Copyright (c) 2016, 2017, 2018, 2019, 2020 The NetBSD Foundation, Inc.
@@ -209,7 +209,7 @@ ATF_TC_BODY(core_dump_procinfo, tc)
"without signal to be sent\n");
#if defined(__aarch64__) || defined(__arm__) || defined(__powerpc__) || \
- defined(__sh3__)
+ defined(__sh3__) || defined(sparc)
/*
* For these archs, program counter is not automatically incremented
* by a trap instruction. We cannot increment PC in the trap handler,
