Module Name: src
Committed By: rin
Date: Sat May 7 04:12:55 UTC 2022
Modified Files:
src/sys/arch/evbppc/dht: locore.S
src/sys/arch/powerpc/include: spr.h
Log Message:
Instead of hard-coding SPR# for CCR0, define SPR_CCR0 in
<powerpc/spr.h> and use it.
Idea from uwe@, thanks!
(and sorry for delayed response!)
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/evbppc/dht/locore.S
cvs rdiff -u -r1.54 -r1.55 src/sys/arch/powerpc/include/spr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbppc/dht/locore.S
diff -u src/sys/arch/evbppc/dht/locore.S:1.2 src/sys/arch/evbppc/dht/locore.S:1.3
--- src/sys/arch/evbppc/dht/locore.S:1.2 Sun Feb 20 18:56:01 2022
+++ src/sys/arch/evbppc/dht/locore.S Sat May 7 04:12:54 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.2 2022/02/20 18:56:01 christos Exp $ */
+/* $NetBSD: locore.S,v 1.3 2022/05/07 04:12:54 rin Exp $ */
/*
* Taken from src/sys/arch/powerpc/ibm4xx/openbios/locore.s:
@@ -120,9 +120,9 @@ __start:
* Note: Meaning of bits we need to set is undocumented.
*/
sync
- mfspr %r0,947 /* mfccr0 %r0 */
+ mfspr %r0,SPR_CCR0 /* XXXclang: mfccr0 %r0 */
oris %r0,%r0,0x50000000@h
- mtspr 947,%r0 /* mtccr0 %r0 */
+ mtspr SPR_CCR0,%r0 /* XXXclang: mtccr0 %r0 */
isync
/* PPC405GP errata, item #58.
Index: src/sys/arch/powerpc/include/spr.h
diff -u src/sys/arch/powerpc/include/spr.h:1.54 src/sys/arch/powerpc/include/spr.h:1.55
--- src/sys/arch/powerpc/include/spr.h:1.54 Tue Nov 2 11:21:24 2021
+++ src/sys/arch/powerpc/include/spr.h Sat May 7 04:12:54 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: spr.h,v 1.54 2021/11/02 11:21:24 ryo Exp $ */
+/* $NetBSD: spr.h,v 1.55 2022/05/07 04:12:54 rin Exp $ */
/*
* Copyright (c) 2001, The NetBSD Foundation, Inc.
@@ -144,6 +144,7 @@ mfspr(int reg)
#define SPR_TBL 0x11c /* E468 Time Base Lower */
#define SPR_TBU 0x11d /* E468 Time Base Upper */
#define SPR_PVR 0x11f /* E468 Processor Version Register */
+#define SPR_CCR0 0x3b3 /* .4.. Core Configuration Register */
/* Time Base Register declarations */
#define TBR_TBL 0x10c /* E468 Time Base Lower */
