Module Name: src
Committed By: jmcneill
Date: Sat Jun 25 12:39:46 UTC 2022
Modified Files:
src/sys/arch/arm/pic: pic_splfuncs.c
Log Message:
pic: splx performance improvement
Skip disabling interrupts and check for pending hard interrupts if old
ipl was < IPL_VM.
To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/pic/pic_splfuncs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.22 src/sys/arch/arm/pic/pic_splfuncs.c:1.23
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.22 Mon Sep 20 21:05:15 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Sat Jun 25 12:39:46 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.22 2021/09/20 21:05:15 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.23 2022/06/25 12:39:46 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -31,7 +31,7 @@
#include "opt_modular.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.22 2021/09/20 21:05:15 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.23 2022/06/25 12:39:46 jmcneill Exp $");
#define _INTR_PRIVATE
#include <sys/param.h>
@@ -97,17 +97,22 @@ pic_default_splx(int savedipl)
return;
}
- register_t psw = DISABLE_INTERRUPT_SAVE();
- KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
- "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
-
- ci->ci_intr_depth++;
- pic_do_pending_ints(psw, savedipl, NULL);
- ci->ci_intr_depth--;
- KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
- ci->ci_cpl, savedipl);
- if ((psw & I32_bit) == 0)
- ENABLE_INTERRUPT();
+ if (ci->ci_cpl >= IPL_VM) {
+ register_t psw = DISABLE_INTERRUPT_SAVE();
+ KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
+ "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
+
+ ci->ci_intr_depth++;
+ pic_do_pending_ints(psw, savedipl, NULL);
+ ci->ci_intr_depth--;
+ KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
+ ci->ci_cpl, savedipl);
+ if ((psw & I32_bit) == 0)
+ ENABLE_INTERRUPT();
+ } else {
+ pic_set_priority(ci, savedipl);
+ }
+
cpu_dosoftints();
KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
ci->ci_cpl, savedipl);