Module Name: src
Committed By: andvar
Date: Mon Jun 27 20:28:31 UTC 2022
Modified Files:
src/sys/arch/amiga/dev: siopreg.h
Log Message:
s/loobpack/loopback/ in comment.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/amiga/dev/siopreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/amiga/dev/siopreg.h
diff -u src/sys/arch/amiga/dev/siopreg.h:1.15 src/sys/arch/amiga/dev/siopreg.h:1.16
--- src/sys/arch/amiga/dev/siopreg.h:1.15 Fri Aug 24 09:01:22 2012
+++ src/sys/arch/amiga/dev/siopreg.h Mon Jun 27 20:28:31 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: siopreg.h,v 1.15 2012/08/24 09:01:22 msaitoh Exp $ */
+/* $NetBSD: siopreg.h,v 1.16 2022/06/27 20:28:31 andvar Exp $ */
/*
* Copyright (c) 1990 The Regents of the University of California.
@@ -462,7 +462,7 @@ typedef volatile siop_regmap_t *siop_reg
#define SIOP_CTEST4_ZMOD 0x40 /* High-impedance outputs */
#define SIOP_CTEST4_SZM 0x20 /* ditto, SCSI "outputs" */
#ifndef ARCH_720
-#define SIOP_CTEST4_SLBE 0x10 /* SCSI loobpack enable */
+#define SIOP_CTEST4_SLBE 0x10 /* SCSI loopback enable */
#define SIOP_CTEST4_SFWR 0x08 /* SCSI FIFO write enable (from sodl) */
#else
#define SIOP_CTEST4_SRTM 0x10 /* Shadow Register Test Mode */
