Module Name: src Committed By: andvar Date: Sun Jul 3 11:30:48 UTC 2022
Modified Files: src/sys/arch/atari/include: video.h src/sys/arch/hp300/dev: sti_sgc.c src/sys/arch/hpcmips/dev: ite8181reg.h src/sys/arch/hpcsh/dev/hd64461: hd64461video.c src/sys/arch/luna68k/dev: lunafb.c src/sys/dev/pci: tgareg.h Log Message: fix various typos in comments, mainly s/pallete/palette/. To generate a diff of this commit: cvs rdiff -u -r1.7 -r1.8 src/sys/arch/atari/include/video.h cvs rdiff -u -r1.6 -r1.7 src/sys/arch/hp300/dev/sti_sgc.c cvs rdiff -u -r1.4 -r1.5 src/sys/arch/hpcmips/dev/ite8181reg.h cvs rdiff -u -r1.56 -r1.57 src/sys/arch/hpcsh/dev/hd64461/hd64461video.c cvs rdiff -u -r1.43 -r1.44 src/sys/arch/luna68k/dev/lunafb.c cvs rdiff -u -r1.6 -r1.7 src/sys/dev/pci/tgareg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/atari/include/video.h diff -u src/sys/arch/atari/include/video.h:1.7 src/sys/arch/atari/include/video.h:1.8 --- src/sys/arch/atari/include/video.h:1.7 Tue Oct 20 19:10:11 2009 +++ src/sys/arch/atari/include/video.h Sun Jul 3 11:30:48 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: video.h,v 1.7 2009/10/20 19:10:11 snj Exp $ */ +/* $NetBSD: video.h,v 1.8 2022/07/03 11:30:48 andvar Exp $ */ /* * Copyright (c) 1995 Leo Weppelman. @@ -112,7 +112,7 @@ struct video { #define RES_TTMID 0x0400 /* 640x480, 16 colors */ #define RES_TTHIGH 0x0600 /* 1280x960, monochrome */ #define RES_TTLOW 0x0700 /* 320x480, 256 colors */ -#define TT_PALLET 0x000f /* Pallette number */ +#define TT_PALLET 0x000f /* Palette number */ #define TT_HYMONO 0x8000 /* Hyper mono mode */ #define TT_SHOLD 0x1000 /* Sample/hold mode */ Index: src/sys/arch/hp300/dev/sti_sgc.c diff -u src/sys/arch/hp300/dev/sti_sgc.c:1.6 src/sys/arch/hp300/dev/sti_sgc.c:1.7 --- src/sys/arch/hp300/dev/sti_sgc.c:1.6 Sat Aug 7 16:18:53 2021 +++ src/sys/arch/hp300/dev/sti_sgc.c Sun Jul 3 11:30:48 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: sti_sgc.c,v 1.6 2021/08/07 16:18:53 thorpej Exp $ */ +/* $NetBSD: sti_sgc.c,v 1.7 2022/07/03 11:30:48 andvar Exp $ */ /* $OpenBSD: sti_sgc.c,v 1.14 2007/05/26 00:36:03 krw Exp $ */ /* @@ -27,7 +27,7 @@ * */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.6 2021/08/07 16:18:53 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.7 2022/07/03 11:30:48 andvar Exp $"); #include <sys/param.h> #include <sys/device.h> @@ -259,7 +259,7 @@ sti_sgc_probe(bus_space_tag_t iot, int s /* * This might not be reliable enough. On the other hand, non-STI - * SGC cards will apparently not initialize in an hp300, to the + * SGC cards will apparently not initialize in the hp300, to the * point of not even answering bus probes (checked with an * Harmony/FDDI SGC card). */ @@ -317,7 +317,7 @@ sti_evrx_resetramdac(struct sti_screen * bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x05); bus_space_write_1(bst, bsh, EVRX_BT458_CTRL, 0x00); - /* pallete enabled, ovly plane disabled */ + /* palette enabled, ovly plane disabled */ bus_space_write_1(bst, bsh, EVRX_BT458_ADDR, 0x06); bus_space_write_1(bst, bsh, EVRX_BT458_CTRL, 0x40); Index: src/sys/arch/hpcmips/dev/ite8181reg.h diff -u src/sys/arch/hpcmips/dev/ite8181reg.h:1.4 src/sys/arch/hpcmips/dev/ite8181reg.h:1.5 --- src/sys/arch/hpcmips/dev/ite8181reg.h:1.4 Sun Dec 11 12:17:33 2005 +++ src/sys/arch/hpcmips/dev/ite8181reg.h Sun Jul 3 11:30:48 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: ite8181reg.h,v 1.4 2005/12/11 12:17:33 christos Exp $ */ +/* $NetBSD: ite8181reg.h,v 1.5 2022/07/03 11:30:48 andvar Exp $ */ /*- * Copyright (c) 2000 SATO Kazumi @@ -38,7 +38,7 @@ #define ITE8181_DATA_CLASS 0x03800000 #define ITE8181_CLASS_MASK 0xffff0000 #define ITE8181_REV_MASK 0x000000ff -#define ITE8181_MBA 0x10 /* Memory Base Address(4MB bounday) */ +#define ITE8181_MBA 0x10 /* Memory Base Address(4MB boundary) */ #define ITE8181_GBA 0x14 /* GUI Base Address(32KB boundary) */ #define ITE8181_SBA 0x18 /* Graphic Base Address (64KB boundary) */ #define ITE8181_TEST 0x40 /* Test Reg. */ @@ -49,7 +49,7 @@ #define ITE8181_DATA_PLL1_RESET 0x4000 /* PLL1 reset */ #define ITE8181_DATA_PLL2_PWDOWN 0x2000 /* PLL2 powerdown */ #define ITE8181_DATA_PLL1_PWDOWN 0x1000 /* PLL1 powerdown */ -#define ITE8181_DATA_PALETTESTBY 0x0200 /* Pallete RAM standby */ +#define ITE8181_DATA_PALETTESTBY 0x0200 /* Palette RAM standby */ #define ITE8181_DATA_CURSORSTBY 0x0100 /* Cursor standby */ #define ITE8181_DATA_BITBLTSTBY 0x0080 /* BitBlt engine standby */ #define ITE8181_DATA_LINESTBY 0x0040 /* Line Draw standby */ @@ -204,7 +204,7 @@ #define ITE8181_FRCCOL_8 0x80 /* option1, 8 color */ #define ITE8181_FRCCOL_16 0x00 /* option2, 16 color */ -#define ITE8181_EMA_FRCPAT 0xa3 /* select frame rate perttern */ +#define ITE8181_EMA_FRCPAT 0xa3 /* select frame rate pattern */ #define ITE8181_FRCPAT_PROGRAM 0x80 #define ITE8181_FRCPAT_CONSTANT 0x00 Index: src/sys/arch/hpcsh/dev/hd64461/hd64461video.c diff -u src/sys/arch/hpcsh/dev/hd64461/hd64461video.c:1.56 src/sys/arch/hpcsh/dev/hd64461/hd64461video.c:1.57 --- src/sys/arch/hpcsh/dev/hd64461/hd64461video.c:1.56 Tue May 24 06:28:00 2022 +++ src/sys/arch/hpcsh/dev/hd64461/hd64461video.c Sun Jul 3 11:30:48 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: hd64461video.c,v 1.56 2022/05/24 06:28:00 andvar Exp $ */ +/* $NetBSD: hd64461video.c,v 1.57 2022/07/03 11:30:48 andvar Exp $ */ /*- * Copyright (c) 2001, 2002, 2004 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: hd64461video.c,v 1.56 2022/05/24 06:28:00 andvar Exp $"); +__KERNEL_RCSID(0, "$NetBSD: hd64461video.c,v 1.57 2022/07/03 11:30:48 andvar Exp $"); #include "opt_hd64461video.h" // #define HD64461VIDEO_HWACCEL @@ -1127,7 +1127,7 @@ hd64461video_set_clut(struct hd64461vide { KASSERT(r && g && b); - /* index pallete */ + /* index palette */ hd64461_reg_write_2(HD64461_LCDCPTWAR_REG16, HD64461_LCDCPTWAR_SET(0, idx)); /* set data */ @@ -1151,7 +1151,7 @@ hd64461video_get_clut(struct hd64461vide { KASSERT(r && g && b); - /* index pallete */ + /* index palette */ hd64461_reg_write_2(HD64461_LCDCPTRAR_REG16, HD64461_LCDCPTRAR_SET(0, idx)); Index: src/sys/arch/luna68k/dev/lunafb.c diff -u src/sys/arch/luna68k/dev/lunafb.c:1.43 src/sys/arch/luna68k/dev/lunafb.c:1.44 --- src/sys/arch/luna68k/dev/lunafb.c:1.43 Sat Aug 7 16:18:57 2021 +++ src/sys/arch/luna68k/dev/lunafb.c Sun Jul 3 11:30:48 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: lunafb.c,v 1.43 2021/08/07 16:18:57 thorpej Exp $ */ +/* $NetBSD: lunafb.c,v 1.44 2022/07/03 11:30:48 andvar Exp $ */ /*- * Copyright (c) 2000 The NetBSD Foundation, Inc. @@ -31,7 +31,7 @@ #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ -__KERNEL_RCSID(0, "$NetBSD: lunafb.c,v 1.43 2021/08/07 16:18:57 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: lunafb.c,v 1.44 2022/07/03 11:30:48 andvar Exp $"); #include <sys/param.h> #include <sys/systm.h> @@ -430,7 +430,7 @@ omfb_resetcmap(struct om_hwdevconfig *dc ndac->bt_addr = 0x05; ndac->bt_ctrl = 0x00; /* all planes have non-blink */ ndac->bt_addr = 0x06; - ndac->bt_ctrl = 0x40; /* pallete enabled, ovly plane disabled */ + ndac->bt_ctrl = 0x40; /* palette enabled, ovly plane disabled */ ndac->bt_addr = 0x07; ndac->bt_ctrl = 0x00; /* no test mode */ Index: src/sys/dev/pci/tgareg.h diff -u src/sys/dev/pci/tgareg.h:1.6 src/sys/dev/pci/tgareg.h:1.7 --- src/sys/dev/pci/tgareg.h:1.6 Sun Dec 11 12:22:50 2005 +++ src/sys/dev/pci/tgareg.h Sun Jul 3 11:30:48 2022 @@ -1,4 +1,4 @@ -/* $NetBSD: tgareg.h,v 1.6 2005/12/11 12:22:50 christos Exp $ */ +/* $NetBSD: tgareg.h,v 1.7 2022/07/03 11:30:48 andvar Exp $ */ /* * Copyright (c) 1995, 1996 Carnegie-Mellon University. @@ -111,7 +111,7 @@ typedef u_int32_t tga_reg_t; #define TGA_REG_GGVR 0x02d /* Green Value */ #define TGA_REG_GBVR 0x02e /* Blue Value */ #define TGA_REG_GSWR 0x02f /* Span Width */ -#define TGA_REG_EPSR 0x030 /* Pallete and DAC Setup */ +#define TGA_REG_EPSR 0x030 /* Palette and DAC Setup */ /* reserved 0x031 - 0x3f */ @@ -156,7 +156,7 @@ typedef u_int32_t tga_reg_t; /* reserved 0x07b */ -#define TGA_REG_EPDR 0x07c /* Pallete and DAC Data */ +#define TGA_REG_EPDR 0x07c /* Palette and DAC Data */ /* reserved 0x07d */