Module Name: src
Committed By: msaitoh
Date: Sat Oct 1 15:50:05 UTC 2022
Modified Files:
src/sys/arch/x86/pci: amdsmn.c amdzentemp.c
Log Message:
amdsmn(4),amdzentemp(4): Add support for 17h/6xh and 19h/6xh.
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/x86/pci/amdsmn.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/x86/pci/amdzentemp.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/amdsmn.c
diff -u src/sys/arch/x86/pci/amdsmn.c:1.13 src/sys/arch/x86/pci/amdsmn.c:1.14
--- src/sys/arch/x86/pci/amdsmn.c:1.13 Wed Apr 27 06:59:25 2022
+++ src/sys/arch/x86/pci/amdsmn.c Sat Oct 1 15:50:05 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: amdsmn.c,v 1.13 2022/04/27 06:59:25 msaitoh Exp $ */
+/* $NetBSD: amdsmn.c,v 1.14 2022/10/01 15:50:05 msaitoh Exp $ */
/*-
* Copyright (c) 2017, 2019 Conrad Meyer <[email protected]>
@@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.13 2022/04/27 06:59:25 msaitoh Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.14 2022/10/01 15:50:05 msaitoh Exp $ ");
/*
* Driver for the AMD Family 15h (model 60+) and 17h CPU
@@ -88,10 +88,20 @@ static const struct pciid {
.amdsmn_data_reg = F17H_SMN_DATA_REG,
},
{
+ .amdsmn_deviceid = PCI_PRODUCT_AMD_F17_6X_RC,
+ .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+ .amdsmn_data_reg = F17H_SMN_DATA_REG,
+ },
+ {
.amdsmn_deviceid = PCI_PRODUCT_AMD_F17_7X_RC,
.amdsmn_addr_reg = F17H_SMN_ADDR_REG,
.amdsmn_data_reg = F17H_SMN_DATA_REG,
},
+ {
+ .amdsmn_deviceid = PCI_PRODUCT_AMD_F19_6X_RC,
+ .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+ .amdsmn_data_reg = F17H_SMN_DATA_REG,
+ },
};
static int amdsmn_match(device_t, cfdata_t, void *);
Index: src/sys/arch/x86/pci/amdzentemp.c
diff -u src/sys/arch/x86/pci/amdzentemp.c:1.14 src/sys/arch/x86/pci/amdzentemp.c:1.15
--- src/sys/arch/x86/pci/amdzentemp.c:1.14 Sun Jun 6 11:35:22 2021
+++ src/sys/arch/x86/pci/amdzentemp.c Sat Oct 1 15:50:05 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: amdzentemp.c,v 1.14 2021/06/06 11:35:22 nonaka Exp $ */
+/* $NetBSD: amdzentemp.c,v 1.15 2022/10/01 15:50:05 msaitoh Exp $ */
/* $OpenBSD: kate.c,v 1.2 2008/03/27 04:52:03 cnst Exp $ */
/*
@@ -53,7 +53,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.14 2021/06/06 11:35:22 nonaka Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.15 2022/10/01 15:50:05 msaitoh Exp $ ");
#include <sys/param.h>
#include <sys/bus.h>
@@ -114,6 +114,7 @@ struct amdzentemp_softc {
size_t sc_sensor_len;
size_t sc_numsensors;
int32_t sc_offset;
+ uint32_t sc_ccd_tmp_base;
};
enum {
@@ -345,7 +346,7 @@ amdzentemp_family17_refresh(struct sysmo
/* Tccd */
i = edata->private - CCD_BASE;
error = amdsmn_read(sc->sc_smn,
- AMD_17H_CCD_TMP_BASE + (i * sizeof(temp)), &temp);
+ sc->sc_ccd_tmp_base + (i * sizeof(temp)), &temp);
if (error || !ISSET(temp, AMD_17H_CCD_TMP_VALID)) {
edata->state = ENVSYS_SINVALID;
return;
@@ -399,6 +400,10 @@ amdzentemp_probe_ccd_sensors19h(struct a
case 0x20 ... 0x2f: /* Zen3 Ryzen "Vermeer" */
maxreg = 8;
break;
+ case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
+ sc->sc_ccd_tmp_base = 0x59b08;
+ maxreg = 8;
+ break;
default:
aprint_error_dev(sc->sc_dev,
"Unrecognized Family 19h Model: %02xh\n", model);
@@ -413,6 +418,9 @@ amdzentemp_probe_ccd_sensors(struct amdz
{
int nccd;
+ /* Set default CCD temp sensor base address. */
+ sc->sc_ccd_tmp_base = 0x59954;
+
switch (family) {
case 0x17:
nccd = amdzentemp_probe_ccd_sensors17h(sc, model);
@@ -437,7 +445,7 @@ amdzentemp_setup_ccd_sensors(struct amdz
for (i = 0; i < sc->sc_numsensors - 1; i++) {
error = amdsmn_read(sc->sc_smn,
- AMD_17H_CCD_TMP_BASE + (i * sizeof(temp)), &temp);
+ sc->sc_ccd_tmp_base + (i * sizeof(temp)), &temp);
if (error || !ISSET(temp, AMD_17H_CCD_TMP_VALID))
continue;