Module Name: src
Committed By: simonb
Date: Wed Oct 12 07:50:57 UTC 2022
Modified Files:
src/sys/arch/riscv/include: reg.h
Log Message:
Fix a tyop regname in a comment.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/riscv/include/reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/include/reg.h
diff -u src/sys/arch/riscv/include/reg.h:1.8 src/sys/arch/riscv/include/reg.h:1.9
--- src/sys/arch/riscv/include/reg.h:1.8 Sat Nov 7 10:48:17 2020
+++ src/sys/arch/riscv/include/reg.h Wed Oct 12 07:50:56 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: reg.h,v 1.8 2020/11/07 10:48:17 skrll Exp $ */
+/* $NetBSD: reg.h,v 1.9 2022/10/12 07:50:56 simonb Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -43,7 +43,7 @@
// x10 - x11 = a0 - a1 (arguments/return values) Caller
// x12 - x17 = a2 - a7 (arguments) Caller
// x18 - x27 = s2 - s11 (saved registers) Callee
-// x28 - x31 = t3 - r6 (temporaries) Caller
+// x28 - x31 = t3 - t6 (temporaries) Caller
struct reg { // synced with register_t in <riscv/types.h>
#ifdef _LP64
