Module Name: src
Committed By: martin
Date: Sat Oct 15 10:20:32 UTC 2022
Modified Files:
src/sys/dev/tprof [netbsd-9]: tprof_x86_intel.c
src/usr.sbin/tprof/arch [netbsd-9]: tprof_x86.c
Log Message:
Pull up following revision(s) (requested by msaitoh in ticket #1543):
sys/dev/tprof/tprof_x86_intel.c: revision 1.4
usr.sbin/tprof/arch/tprof_x86.c: revision 1.10
usr.sbin/tprof/arch/tprof_x86.c: revision 1.11
usr.sbin/tprof/arch/tprof_x86.c: revision 1.12
Fix typo in a comment.
Use CPUID_PERF_* macros defined in specialreg.h. No functional change.
Add topdown-slots to Intel architectural performance monitoring version 1.
Disable the unsupported events from the bit vector length in EAX.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.3.2.1 src/sys/dev/tprof/tprof_x86_intel.c
cvs rdiff -u -r1.8.4.1 -r1.8.4.2 src/usr.sbin/tprof/arch/tprof_x86.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/tprof/tprof_x86_intel.c
diff -u src/sys/dev/tprof/tprof_x86_intel.c:1.3 src/sys/dev/tprof/tprof_x86_intel.c:1.3.2.1
--- src/sys/dev/tprof/tprof_x86_intel.c:1.3 Fri Jun 14 11:50:35 2019
+++ src/sys/dev/tprof/tprof_x86_intel.c Sat Oct 15 10:20:32 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: tprof_x86_intel.c,v 1.3 2019/06/14 11:50:35 msaitoh Exp $ */
+/* $NetBSD: tprof_x86_intel.c,v 1.3.2.1 2022/10/15 10:20:32 martin Exp $ */
/*
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -56,7 +56,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tprof_x86_intel.c,v 1.3 2019/06/14 11:50:35 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tprof_x86_intel.c,v 1.3.2.1 2022/10/15 10:20:32 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -90,10 +90,6 @@ __KERNEL_RCSID(0, "$NetBSD: tprof_x86_in
#define PERFEVTSEL_INV __BIT(23)
#define PERFEVTSEL_COUNTER_MASK __BITS(24, 31)
-#define CPUID_0A_VERSION __BITS(0, 7)
-#define CPUID_0A_NCOUNTERS __BITS(8, 15)
-#define CPUID_0A_BITWIDTH __BITS(16, 23)
-
static uint64_t counter_bitwidth;
static uint64_t counter_val = 5000000;
static uint64_t counter_reset_val;
@@ -195,14 +191,14 @@ tprof_intel_ident(void)
return TPROF_IDENT_NONE;
}
x86_cpuid(0x0A, descs);
- if ((descs[0] & CPUID_0A_VERSION) == 0) {
+ if ((descs[0] & CPUID_PERF_VERSION) == 0) {
return TPROF_IDENT_NONE;
}
- if ((descs[0] & CPUID_0A_NCOUNTERS) == 0) {
+ if ((descs[0] & CPUID_PERF_NGPPC) == 0) {
return TPROF_IDENT_NONE;
}
- counter_bitwidth = __SHIFTOUT(descs[0], CPUID_0A_BITWIDTH);
+ counter_bitwidth = __SHIFTOUT(descs[0], CPUID_PERF_NBWGPPC);
return TPROF_IDENT_INTEL_GENERIC;
}
Index: src/usr.sbin/tprof/arch/tprof_x86.c
diff -u src/usr.sbin/tprof/arch/tprof_x86.c:1.8.4.1 src/usr.sbin/tprof/arch/tprof_x86.c:1.8.4.2
--- src/usr.sbin/tprof/arch/tprof_x86.c:1.8.4.1 Sat Oct 12 14:34:45 2019
+++ src/usr.sbin/tprof/arch/tprof_x86.c Sat Oct 15 10:20:32 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: tprof_x86.c,v 1.8.4.1 2019/10/12 14:34:45 martin Exp $ */
+/* $NetBSD: tprof_x86.c,v 1.8.4.2 2022/10/15 10:20:32 martin Exp $ */
/*
* Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -85,6 +85,7 @@ static struct name_to_event intel_arch1_
{ "llc-misses", 0x2E, 0x41, true },
{ "branch-instruction-retired", 0xC4, 0x00, true },
{ "branch-misses-retired", 0xC5, 0x00, true },
+ { "topdown-slots", 0xA4, 0x01, true },
};
static struct event_table intel_arch1 = {
@@ -98,7 +99,7 @@ static struct event_table intel_arch1 =
static struct event_table *
init_intel_arch1(void)
{
- unsigned int eax, ebx, ecx, edx;
+ unsigned int eax, ebx, ecx, edx, vectorlen;
struct event_table *table;
size_t i;
@@ -108,9 +109,17 @@ init_intel_arch1(void)
edx = 0;
x86_cpuid(&eax, &ebx, &ecx, &edx);
+ vectorlen = __SHIFTOUT(eax, CPUID_PERF_BVECLEN);
+
table = &intel_arch1;
for (i = 0; i < table->nevents; i++) {
- /* Disable the unsupported events. */
+ /*
+ * Disable the unsupported events from:
+ * a) the bit vector length in EAX.
+ * b) the disable bit in EBX.
+ */
+ if (i >= vectorlen)
+ table->names[i].enabled = false;
if ((ebx & (i << 1)) != 0)
table->names[i].enabled = false;
}
@@ -550,7 +559,7 @@ init_intel_generic(void)
table->next = init_intel_silvermont_airmont();
break;
case 0x5C: /* Goldmont (Apollo Lake) */
- case 0x5F: /* Goldmont (Denvertion) */
+ case 0x5F: /* Goldmont (Denverton) */
table->next = init_intel_goldmont();
break;
case 0x7A: /* Goldmont Plus (Gemini Lake) */
