Module Name:    src
Committed By:   jmcneill
Date:           Wed Nov  2 11:04:02 UTC 2022

Modified Files:
        src/sys/dev/fdt: arasan_sdhc_fdt.c

Log Message:
Re-enable ADMA2 support for arasan,sdhci-8.9a


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/dev/fdt/arasan_sdhc_fdt.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/fdt/arasan_sdhc_fdt.c
diff -u src/sys/dev/fdt/arasan_sdhc_fdt.c:1.12 src/sys/dev/fdt/arasan_sdhc_fdt.c:1.13
--- src/sys/dev/fdt/arasan_sdhc_fdt.c:1.12	Tue Nov  1 00:57:39 2022
+++ src/sys/dev/fdt/arasan_sdhc_fdt.c	Wed Nov  2 11:04:02 2022
@@ -1,4 +1,4 @@
-/* $NetBSD: arasan_sdhc_fdt.c,v 1.12 2022/11/01 00:57:39 jmcneill Exp $ */
+/* $NetBSD: arasan_sdhc_fdt.c,v 1.13 2022/11/02 11:04:02 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2019 Jared McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: arasan_sdhc_fdt.c,v 1.12 2022/11/01 00:57:39 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arasan_sdhc_fdt.c,v 1.13 2022/11/02 11:04:02 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -53,8 +53,8 @@ __KERNEL_RCSID(0, "$NetBSD: arasan_sdhc_
 #define	 RK3399_CORECFG_CLOCKMULTIPLIER		__BITS(7,0)
 
 enum arasan_sdhc_type {
-	AS_TYPE_RK3399 = 1,
-	AS_TYPE_SDHCI_8_9A,
+	AS_TYPE_GENERIC,
+	AS_TYPE_RK3399,
 };
 
 struct arasan_sdhc_softc {
@@ -78,7 +78,7 @@ static const struct device_compatible_en
 	  .value = AS_TYPE_RK3399 },
 
 	{ .compat = "arasan,sdhci-8.9a",
-	  .value = AS_TYPE_SDHCI_8_9A },
+	  .value = AS_TYPE_GENERIC },
 
 	DEVICE_COMPAT_EOL
 };
@@ -296,13 +296,6 @@ arasan_sdhc_attach(device_t parent, devi
 			       SDHC_FLAG_32BIT_ACCESS |
 			       SDHC_FLAG_USE_DMA |
 			       SDHC_FLAG_STOP_WITH_TC;
-	if (sc->sc_type == AS_TYPE_SDHCI_8_9A) {
-		/*
-		 * Workaround for sporadic transfer errors on the Arasan SDHCI
-		 * found in the Xilinx Zynq-7000 SoC.
-		 */
-		sc->sc_base.sc_flags |= SDHC_FLAG_BROKEN_ADMA;
-	}
 	if (bus_width == 8) {
 		sc->sc_base.sc_flags |= SDHC_FLAG_8BIT_MODE;
 	}

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