Module Name: src Committed By: tsutsui Date: Fri Feb 3 23:06:42 UTC 2023
Modified Files: src/sys/arch/next68k/dev: nextdma.c nextdmareg.h nextdmavar.h Log Message: Misc KNF and cosmetics. To generate a diff of this commit: cvs rdiff -u -r1.50 -r1.51 src/sys/arch/next68k/dev/nextdma.c cvs rdiff -u -r1.9 -r1.10 src/sys/arch/next68k/dev/nextdmareg.h cvs rdiff -u -r1.17 -r1.18 src/sys/arch/next68k/dev/nextdmavar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/next68k/dev/nextdma.c diff -u src/sys/arch/next68k/dev/nextdma.c:1.50 src/sys/arch/next68k/dev/nextdma.c:1.51 --- src/sys/arch/next68k/dev/nextdma.c:1.50 Fri Mar 31 08:38:13 2017 +++ src/sys/arch/next68k/dev/nextdma.c Fri Feb 3 23:06:42 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: nextdma.c,v 1.50 2017/03/31 08:38:13 msaitoh Exp $ */ +/* $NetBSD: nextdma.c,v 1.51 2023/02/03 23:06:42 tsutsui Exp $ */ /* * Copyright (c) 1998 Darrin B. Jewell * All rights reserved. @@ -25,11 +25,11 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: nextdma.c,v 1.50 2017/03/31 08:38:13 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: nextdma.c,v 1.51 2023/02/03 23:06:42 tsutsui Exp $"); #include <sys/param.h> #include <sys/systm.h> -#include <sys/mbuf.h> +#include <sys/mbuf.h> #include <sys/syslog.h> #include <sys/socket.h> #include <sys/device.h> @@ -168,14 +168,32 @@ CFATTACH_DECL_NEW(nextdma, sizeof(struct static struct nextdma_channel nextdma_channel[] = { #if NESP > 0 - { "scsi", NEXT_P_SCSI_CSR, DD_SIZE, NEXT_I_SCSI_DMA, &nextdma_esp_intr }, + { + "scsi", + NEXT_P_SCSI_CSR, + DD_SIZE, + NEXT_I_SCSI_DMA, + &nextdma_esp_intr + }, #endif #if NXE > 0 - { "enetx", NEXT_P_ENETX_CSR, DD_SIZE, NEXT_I_ENETX_DMA, &nextdma_enet_intr }, - { "enetr", NEXT_P_ENETR_CSR, DD_SIZE, NEXT_I_ENETR_DMA, &nextdma_enet_intr }, + { + "enetx", + NEXT_P_ENETX_CSR, + DD_SIZE, + NEXT_I_ENETX_DMA, + &nextdma_enet_intr + }, + { + "enetr", + NEXT_P_ENETR_CSR, + DD_SIZE, + NEXT_I_ENETR_DMA, + &nextdma_enet_intr + }, #endif }; -static int nnextdma_channels = (sizeof(nextdma_channel)/sizeof(nextdma_channel[0])); +static int nnextdma_channels = __arraycount(nextdma_channel); static int attached = 0; @@ -206,11 +224,11 @@ nextdma_match(device_t parent, cfdata_t struct intio_attach_args *ia = (struct intio_attach_args *)aux; if (attached >= nnextdma_channels) - return (0); + return 0; ia->ia_addr = (void *)nextdma_channel[attached].nd_base; - return (1); + return 1; } void @@ -229,22 +247,20 @@ nextdma_attach(device_t parent, device_t nsc->sc_bst = ia->ia_bst; if (bus_space_map(nsc->sc_bst, nsc->sc_chan->nd_base, - nsc->sc_chan->nd_size, 0, &nsc->sc_bsh)) { + nsc->sc_chan->nd_size, 0, &nsc->sc_bsh)) { panic("%s: can't map DMA registers for channel %s", - device_xname(self), nsc->sc_chan->nd_name); + device_xname(self), nsc->sc_chan->nd_name); } - nextdma_init (nsc); + nextdma_init(nsc); isrlink_autovec(nsc->sc_chan->nd_intrfunc, nsc, - NEXT_I_IPL(nsc->sc_chan->nd_intr), 10, NULL); + NEXT_I_IPL(nsc->sc_chan->nd_intr), 10, NULL); INTR_ENABLE(nsc->sc_chan->nd_intr); - printf (": channel %d (%s)\n", attached, + printf(": channel %d (%s)\n", attached, nsc->sc_chan->nd_name); attached++; - - return; } void @@ -257,7 +273,7 @@ nextdma_init(struct nextdma_softc *nsc) snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS, NEXT_I_BIT(nsc->sc_chan->nd_intr)); printf("DMA init ipl (%ld) intr(%s)\n", - NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf); + NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf); } #endif @@ -267,8 +283,8 @@ nextdma_init(struct nextdma_softc *nsc) nsc->sc_stat.nd_idx_cont = 0; nsc->sc_stat.nd_exception = 0; - nd_bsw4 (DD_CSR, DMACSR_RESET | DMACSR_CLRCOMPLETE); - nd_bsw4 (DD_CSR, 0); + nd_bsw4(DD_CSR, DMACSR_RESET | DMACSR_CLRCOMPLETE); + nd_bsw4(DD_CSR, 0); #if 01 nextdma_setup_curr_regs(nsc); @@ -287,10 +303,10 @@ nextdma_init(struct nextdma_softc *nsc) */ state &= (DMACSR_COMPLETE | DMACSR_SUPDATE | DMACSR_ENABLE); #else - state &= (DMACSR_BUSEXC | DMACSR_COMPLETE | + state &= (DMACSR_BUSEXC | DMACSR_COMPLETE | DMACSR_SUPDATE | DMACSR_ENABLE); #endif - if (state) { + if (state != 0) { nextdma_print(nsc); panic("DMA did not reset"); } @@ -309,17 +325,19 @@ nextdma_reset(struct nextdma_softc *nsc) DPRINTF(("DMA reset\n")); #if (defined(ND_DEBUG)) - if (NEXTDMA_DEBUG > 1) nextdma_print(nsc); + if (NEXTDMA_DEBUG > 1) + nextdma_print(nsc); #endif - nd_bsw4 (DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET); + nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET); if ((stat->nd_map) || (stat->nd_map_cont)) { if (stat->nd_map_cont) { - DPRINTF(("DMA: resetting with non null continue map\n")); - if (nsc->sc_conf.nd_completed_cb) - (*nsc->sc_conf.nd_completed_cb) - (stat->nd_map_cont, nsc->sc_conf.nd_cb_arg); - + DPRINTF( + ("DMA: resetting with non null continue map\n")); + if (nsc->sc_conf.nd_completed_cb) + (*nsc->sc_conf.nd_completed_cb)( + stat->nd_map_cont, nsc->sc_conf.nd_cb_arg); + stat->nd_map_cont = 0; stat->nd_idx_cont = 0; } @@ -335,7 +353,8 @@ nextdma_reset(struct nextdma_softc *nsc) /****************************************************************/ -/* Call the completed and continue callbacks to try to fill +/* + * Call the completed and continue callbacks to try to fill * in the dma continue buffers. */ void @@ -343,19 +362,19 @@ nextdma_rotate(struct nextdma_softc *nsc { struct nextdma_status *stat = &nsc->sc_stat; - NDTRACEIF (ndtrace_addc('r')); + NDTRACEIF(ndtrace_addc('r')); DPRINTF(("DMA nextdma_rotate()\n")); /* Rotate the continue map into the current map */ stat->nd_map = stat->nd_map_cont; stat->nd_idx = stat->nd_idx_cont; - if ((!stat->nd_map_cont) || + if ((stat->nd_map_cont == NULL) || ((++stat->nd_idx_cont >= stat->nd_map_cont->dm_nsegs))) { - if (nsc->sc_conf.nd_continue_cb) { + if (nsc->sc_conf.nd_continue_cb != NULL) { stat->nd_map_cont = (*nsc->sc_conf.nd_continue_cb) (nsc->sc_conf.nd_cb_arg); - if (stat->nd_map_cont) { + if (stat->nd_map_cont != NULL) { stat->nd_map_cont->dm_xfer_len = 0; } } else { @@ -366,12 +385,14 @@ nextdma_rotate(struct nextdma_softc *nsc #if defined(DIAGNOSTIC) && 0 if (stat->nd_map_cont) { - if (!DMA_BEGINALIGNED(stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr)) { + if (!DMA_BEGINALIGNED( + stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr)) { nextdma_print(nsc); panic("DMA request unaligned at start"); } - if (!DMA_ENDALIGNED(stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr + - stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len)) { + if (!DMA_ENDALIGNED( + stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr + + stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len)) { nextdma_print(nsc); panic("DMA request unaligned at end"); } @@ -389,16 +410,17 @@ nextdma_setup_curr_regs(struct nextdma_s bus_addr_t dd_saved_limit; struct nextdma_status *stat = &nsc->sc_stat; - NDTRACEIF (ndtrace_addc('C')); + NDTRACEIF(ndtrace_addc('C')); DPRINTF(("DMA nextdma_setup_curr_regs()\n")); - if (stat->nd_map) { + if (stat->nd_map != NULL) { dd_next = stat->nd_map->dm_segs[stat->nd_idx].ds_addr; dd_limit = (stat->nd_map->dm_segs[stat->nd_idx].ds_addr + stat->nd_map->dm_segs[stat->nd_idx].ds_len); if (!turbo && nsc->sc_chan->nd_intr == NEXT_I_ENETX_DMA) { - dd_limit |= 0x80000000; /* Ethernet transmit needs secret magic */ + /* Ethernet transmit needs secret magic */ + dd_limit |= 0x80000000; dd_limit += 15; } } else { @@ -409,25 +431,28 @@ nextdma_setup_curr_regs(struct nextdma_s dd_saved_next = dd_next; dd_saved_limit = dd_limit; - NDTRACEIF (if (stat->nd_map) { - ndtrace_printf("%ld", stat->nd_map->dm_segs[stat->nd_idx].ds_len); + NDTRACEIF(if (stat->nd_map) { + ndtrace_printf("%ld", + stat->nd_map->dm_segs[stat->nd_idx].ds_len); }); if (!turbo && (nsc->sc_chan->nd_intr == NEXT_I_ENETX_DMA)) { - nd_bsw4 (DD_NEXT_INITBUF, dd_next); + nd_bsw4(DD_NEXT_INITBUF, dd_next); } else { - nd_bsw4 (DD_NEXT, dd_next); + nd_bsw4(DD_NEXT, dd_next); } - nd_bsw4 (DD_LIMIT, dd_limit); - if (!turbo) nd_bsw4 (DD_SAVED_NEXT, dd_saved_next); - if (!turbo) nd_bsw4 (DD_SAVED_LIMIT, dd_saved_limit); + nd_bsw4(DD_LIMIT, dd_limit); + if (!turbo) + nd_bsw4(DD_SAVED_NEXT, dd_saved_next); + if (!turbo) + nd_bsw4(DD_SAVED_LIMIT, dd_saved_limit); #ifdef DIAGNOSTIC - if ((nd_bsr4 (DD_NEXT_INITBUF) != dd_next) - || (nd_bsr4 (DD_NEXT) != dd_next) - || (nd_bsr4 (DD_LIMIT) != dd_limit) - || (!turbo && (nd_bsr4 (DD_SAVED_NEXT) != dd_saved_next)) - || (!turbo && (nd_bsr4 (DD_SAVED_LIMIT) != dd_saved_limit)) + if ((nd_bsr4(DD_NEXT_INITBUF) != dd_next) + || (nd_bsr4(DD_NEXT) != dd_next) + || (nd_bsr4(DD_LIMIT) != dd_limit) + || (!turbo && (nd_bsr4(DD_SAVED_NEXT) != dd_saved_next)) + || (!turbo && (nd_bsr4(DD_SAVED_LIMIT) != dd_saved_limit)) ) { nextdma_print(nsc); panic("DMA failure writing to current regs"); @@ -444,42 +469,48 @@ nextdma_setup_cont_regs(struct nextdma_s bus_addr_t dd_saved_stop; struct nextdma_status *stat = &nsc->sc_stat; - NDTRACEIF (ndtrace_addc('c')); + NDTRACEIF(ndtrace_addc('c')); DPRINTF(("DMA nextdma_setup_regs()\n")); - if (stat->nd_map_cont) { - dd_start = stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr; - dd_stop = (stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr + - stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len); + if (stat->nd_map_cont != NULL) { + dd_start = + stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr; + dd_stop = + stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr + + stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len; if (!turbo && nsc->sc_chan->nd_intr == NEXT_I_ENETX_DMA) { - dd_stop |= 0x80000000; /* Ethernet transmit needs secret magic */ + /* Ethernet transmit needs secret magic */ + dd_stop |= 0x80000000; dd_stop += 15; } } else { - dd_start = turbo ? nd_bsr4 (DD_NEXT) : 0xdeadbee0; + dd_start = turbo ? nd_bsr4(DD_NEXT) : 0xdeadbee0; dd_stop = turbo ? 0 : 0xdeadbee0; } dd_saved_start = dd_start; dd_saved_stop = dd_stop; - NDTRACEIF (if (stat->nd_map_cont) { - ndtrace_printf("%ld", stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len); + NDTRACEIF(if (stat->nd_map_cont != NULL) { + ndtrace_printf("%ld", + stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len); }); - nd_bsw4 (DD_START, dd_start); - nd_bsw4 (DD_STOP, dd_stop); - if (!turbo) nd_bsw4 (DD_SAVED_START, dd_saved_start); - if (!turbo) nd_bsw4 (DD_SAVED_STOP, dd_saved_stop); + nd_bsw4(DD_START, dd_start); + nd_bsw4(DD_STOP, dd_stop); + if (!turbo) + nd_bsw4(DD_SAVED_START, dd_saved_start); + if (!turbo) + nd_bsw4(DD_SAVED_STOP, dd_saved_stop); if (turbo && nsc->sc_chan->nd_intr == NEXT_I_ENETR_DMA) - nd_bsw4 (DD_STOP - 0x40, dd_start); + nd_bsw4(DD_STOP - 0x40, dd_start); #ifdef DIAGNOSTIC - if ((nd_bsr4 (DD_START) != dd_start) - || (dd_stop && (nd_bsr4 (DD_STOP) != dd_stop)) - || (!turbo && (nd_bsr4 (DD_SAVED_START) != dd_saved_start)) - || (!turbo && (nd_bsr4 (DD_SAVED_STOP) != dd_saved_stop)) + if ((nd_bsr4(DD_START) != dd_start) + || (dd_stop && (nd_bsr4(DD_STOP) != dd_stop)) + || (!turbo && (nd_bsr4(DD_SAVED_START) != dd_saved_start)) + || (!turbo && (nd_bsr4(DD_SAVED_STOP) != dd_saved_stop)) ) { nextdma_print(nsc); panic("DMA failure writing to continue regs"); @@ -500,13 +531,12 @@ nextdma_esp_intr(void *arg) */ struct nextdma_softc *nsc = arg; int esp_dma_int(void *); /* XXX */ - + if (!INTR_OCCURRED(nsc->sc_chan->nd_intr)) return 0; /* Handle dma interrupts */ - return esp_dma_int (nsc->sc_conf.nd_cb_arg); - + return esp_dma_int(nsc->sc_conf.nd_cb_arg); } #endif @@ -514,7 +544,9 @@ nextdma_esp_intr(void *arg) static int nextdma_enet_intr(void *arg) { - /* @@@ This is bogus, we can't be certain of arg's type + + /* + * @@@ This is bogus, we can't be certain of arg's type * unless the interrupt is for us. For now we successfully * cheat because DMA interrupts are the only things invoked * at this interrupt level. @@ -531,7 +563,7 @@ nextdma_enet_intr(void *arg) return 0; /* Handle dma interrupts */ - NDTRACEIF (ndtrace_addc('D')); + NDTRACEIF(ndtrace_addc('D')); #ifdef ND_DEBUG if (NEXTDMA_DEBUG) { char sbuf[256]; @@ -539,25 +571,25 @@ nextdma_enet_intr(void *arg) snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS, NEXT_I_BIT(nsc->sc_chan->nd_intr)); printf("DMA interrupt ipl (%ld) intr(%s)\n", - NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf); + NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf); } #endif #ifdef DIAGNOSTIC - if (!stat->nd_map) { + if (stat->nd_map == NULL) { nextdma_print(nsc); panic("DMA missing current map in interrupt!"); } #endif - state = nd_bsr4 (DD_CSR); + state = nd_bsr4(DD_CSR); #if defined(ND_DEBUG) nextdma_debug_savestate(nsc, state); #endif #ifdef DIAGNOSTIC - if (/* (state & DMACSR_READ) || */ !(state & DMACSR_COMPLETE)) { + if (/* (state & DMACSR_READ) || */ (state & DMACSR_COMPLETE) == 0) { char sbuf[256]; nextdma_print(nsc); snprintb(sbuf, sizeof(sbuf), DMACSR_BITS, state); @@ -567,16 +599,16 @@ nextdma_enet_intr(void *arg) #endif DPRINTF(("DMA: finishing xfer\n")); - + onext = stat->nd_map->dm_segs[stat->nd_idx].ds_addr; olimit = onext + stat->nd_map->dm_segs[stat->nd_idx].ds_len; result = 0; - if (state & DMACSR_ENABLE) { + if ((state & DMACSR_ENABLE) != 0) { /* enable bit was set */ result |= 0x01; } - if (state & DMACSR_SUPDATE) { + if ((state & DMACSR_SUPDATE) != 0) { /* supdate bit was set */ result |= 0x02; } @@ -585,7 +617,7 @@ nextdma_enet_intr(void *arg) /* Expecting a shutdown, didn't SETSUPDATE last turn */ result |= 0x04; } - if (state & DMACSR_BUSEXC) { + if ((state & DMACSR_BUSEXC) != 0) { /* bus exception bit was set */ result |= 0x08; } @@ -593,38 +625,42 @@ nextdma_enet_intr(void *arg) case 0x00: /* !BUSEXC && !expecting && !SUPDATE && !ENABLE */ case 0x08: /* BUSEXC && !expecting && !SUPDATE && !ENABLE */ if (turbo) { - volatile u_int *limit = (volatile u_int *)IIOV(0x2000050+0x4000); + volatile u_int *limit = + (volatile u_int *)IIOV(0x2000050 + 0x4000); slimit = *limit; } else { - slimit = nd_bsr4 (DD_SAVED_LIMIT); + slimit = nd_bsr4(DD_SAVED_LIMIT); } break; case 0x01: /* !BUSEXC && !expecting && !SUPDATE && ENABLE */ case 0x09: /* BUSEXC && !expecting && !SUPDATE && ENABLE */ if (turbo) { - volatile u_int *limit = (volatile u_int *)IIOV(0x2000050+0x4000); + volatile u_int *limit = + (volatile u_int *)IIOV(0x2000050 + 0x4000); slimit = *limit; } else { - slimit = nd_bsr4 (DD_SAVED_LIMIT); + slimit = nd_bsr4(DD_SAVED_LIMIT); } break; case 0x02: /* !BUSEXC && !expecting && SUPDATE && !ENABLE */ - case 0x0a: /* BUSEXC && !expecting && SUPDATE && !ENABLE */ - slimit = nd_bsr4 (DD_NEXT); + case 0x0a: /* BUSEXC && !expecting && SUPDATE && !ENABLE */ + slimit = nd_bsr4(DD_NEXT); break; case 0x04: /* !BUSEXC && expecting && !SUPDATE && !ENABLE */ - case 0x0c: /* BUSEXC && expecting && !SUPDATE && !ENABLE */ - slimit = nd_bsr4 (DD_LIMIT); + case 0x0c: /* BUSEXC && expecting && !SUPDATE && !ENABLE */ + slimit = nd_bsr4(DD_LIMIT); break; default: #ifdef DIAGNOSTIC { char sbuf[256]; - printf("DMA: please send this output to port-next68k-maintai...@netbsd.org:\n"); + printf("DMA: please send this output to" + " port-next68k-maintai...@netbsd.org:\n"); snprintb(sbuf, sizeof(sbuf), DMACSR_BITS, state); printf("DMA: state %s\n",sbuf); nextdma_print(nsc); - panic("DMA: condition 0x%02x not yet documented to occur",result); + panic("DMA: condition 0x%02x not yet documented to occur", + result); } #endif slimit = olimit; @@ -637,32 +673,37 @@ nextdma_enet_intr(void *arg) } #ifdef DIAGNOSTIC - if ((state & DMACSR_READ)) - DPRINTF (("limits: 0x%08lx <= 0x%08lx <= 0x%08lx %s\n", onext, slimit, olimit, - (state & DMACSR_READ) ? "read" : "write")); - if ((slimit < onext) || (slimit > olimit)) { + if ((state & DMACSR_READ) != 0) + DPRINTF(("limits: 0x%08lx <= 0x%08lx <= 0x%08lx %s\n", + onext, slimit, olimit, + (state & DMACSR_READ) ? "read" : "write")); + if (slimit < onext || slimit > olimit) { char sbuf[256]; snprintb(sbuf, sizeof(sbuf), DMACSR_BITS, state); printf("DMA: state %s\n",sbuf); nextdma_print(nsc); - panic("DMA: Unexpected limit register (0x%08lx) in finish_xfer",slimit); + panic("DMA: Unexpected limit register (0x%08lx) in finish_xfer", + slimit); } #endif #ifdef DIAGNOSTIC - if ((state & DMACSR_ENABLE) && ((stat->nd_idx+1) != stat->nd_map->dm_nsegs)) { + if ((state & DMACSR_ENABLE) != 0 && + stat->nd_idx + 1 != stat->nd_map->dm_nsegs) { if (slimit != olimit) { char sbuf[256]; snprintb(sbuf, sizeof(sbuf), DMACSR_BITS, state); printf("DMA: state %s\n",sbuf); nextdma_print(nsc); - panic("DMA: short limit register (0x%08lx) w/o finishing map.",slimit); + panic("DMA: short limit register (0x%08lx)" + " w/o finishing map.", slimit); } } #endif #if (defined(ND_DEBUG)) - if (NEXTDMA_DEBUG > 2) nextdma_print(nsc); + if (NEXTDMA_DEBUG > 2) + nextdma_print(nsc); #endif stat->nd_map->dm_xfer_len += slimit-onext; @@ -670,10 +711,10 @@ nextdma_enet_intr(void *arg) /* If we've reached the end of the current map, then inform * that we've completed that map. */ - if ((stat->nd_idx+1) == stat->nd_map->dm_nsegs) { - if (nsc->sc_conf.nd_completed_cb) - (*nsc->sc_conf.nd_completed_cb) - (stat->nd_map, nsc->sc_conf.nd_cb_arg); + if (stat->nd_idx + 1 == stat->nd_map->dm_nsegs) { + if (nsc->sc_conf.nd_completed_cb) + (*nsc->sc_conf.nd_completed_cb)(stat->nd_map, + nsc->sc_conf.nd_cb_arg); } else { KASSERT(stat->nd_map == stat->nd_map_cont); KASSERT(stat->nd_idx+1 == stat->nd_idx_cont); @@ -685,16 +726,16 @@ nextdma_enet_intr(void *arg) if (NEXTDMA_DEBUG) { char sbuf[256]; snprintb(sbuf, sizeof(sbuf), DMACSR_BITS, state); - printf("CLNDMAP: dd->dd_csr = %s\n", sbuf); + printf("CLNDMAP: dd->dd_csr = %s\n", sbuf); } #endif - if (state & DMACSR_ENABLE) { + if ((state & DMACSR_ENABLE) != 0) { u_long dmadir; /* DMACSR_SETREAD or DMACSR_SETWRITE */ nextdma_rotate(nsc); nextdma_setup_cont_regs(nsc); - - if (state & DMACSR_READ) { + + if ((state & DMACSR_READ) != 0) { dmadir = DMACSR_SETREAD; } else { dmadir = DMACSR_SETWRITE; @@ -702,31 +743,33 @@ nextdma_enet_intr(void *arg) if (stat->nd_map_cont == NULL) { KASSERT(stat->nd_idx+1 == stat->nd_map->dm_nsegs); - nd_bsw4 (DD_CSR, DMACSR_CLRCOMPLETE | dmadir); - NDTRACEIF (ndtrace_addc('g')); + nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | dmadir); + NDTRACEIF(ndtrace_addc('g')); } else { - nd_bsw4 (DD_CSR, DMACSR_CLRCOMPLETE | dmadir | DMACSR_SETSUPDATE); - NDTRACEIF (ndtrace_addc('G')); + nd_bsw4(DD_CSR, + DMACSR_CLRCOMPLETE | dmadir | DMACSR_SETSUPDATE); + NDTRACEIF(ndtrace_addc('G')); } } else { DPRINTF(("DMA: a shutdown occurred\n")); - nd_bsw4 (DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET); - + nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET); + /* Cleanup more incomplete transfers */ /* cleanup continue map */ if (stat->nd_map_cont) { - DPRINTF(("DMA: shutting down with non null continue map\n")); - if (nsc->sc_conf.nd_completed_cb) - (*nsc->sc_conf.nd_completed_cb) - (stat->nd_map_cont, nsc->sc_conf.nd_cb_arg); - + DPRINTF(("DMA: shutting down with" + " non null continue map\n")); + if (nsc->sc_conf.nd_completed_cb != NULL) + (*nsc->sc_conf.nd_completed_cb)( + stat->nd_map_cont, nsc->sc_conf.nd_cb_arg); + stat->nd_map_cont = 0; stat->nd_idx_cont = 0; } - if (nsc->sc_conf.nd_shutdown_cb) + if (nsc->sc_conf.nd_shutdown_cb != NULL) (*nsc->sc_conf.nd_shutdown_cb)(nsc->sc_conf.nd_cb_arg); } - + #ifdef ND_DEBUG if (NEXTDMA_DEBUG) { char sbuf[256]; @@ -734,11 +777,11 @@ nextdma_enet_intr(void *arg) snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS, NEXT_I_BIT(nsc->sc_chan->nd_intr)); printf("DMA exiting interrupt ipl (%ld) intr(%s)\n", - NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf); + NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf); } #endif - - return(1); + + return 1; } #endif @@ -755,7 +798,7 @@ nextdma_finished(struct nextdma_softc *n r = (stat->nd_map == NULL) && (stat->nd_map_cont == NULL); splx(s); - return(r); + return r; } void @@ -763,14 +806,15 @@ nextdma_start(struct nextdma_softc *nsc, { struct nextdma_status *stat = &nsc->sc_stat; - NDTRACEIF (ndtrace_addc('n')); + NDTRACEIF(ndtrace_addc('n')); #ifdef DIAGNOSTIC if (!nextdma_finished(nsc)) { char sbuf[256]; snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS, NEXT_I_BIT(nsc->sc_chan->nd_intr)); - panic("DMA trying to start before previous finished on intr(%s)", sbuf); + panic("DMA trying to start before previous finished" + " on intr(%s)", sbuf); } #endif @@ -781,24 +825,25 @@ nextdma_start(struct nextdma_softc *nsc, snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS, NEXT_I_BIT(nsc->sc_chan->nd_intr)); printf("DMA start (%ld) intr(%s)\n", - NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf); + NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf); } #endif #ifdef DIAGNOSTIC - if (stat->nd_map) { + if (stat->nd_map != NULL) { nextdma_print(nsc); panic("DMA: nextdma_start() with non null map"); } - if (stat->nd_map_cont) { + if (stat->nd_map_cont != NULL) { nextdma_print(nsc); panic("DMA: nextdma_start() with non null continue map"); } #endif #ifdef DIAGNOSTIC - if ((dmadir != DMACSR_SETREAD) && (dmadir != DMACSR_SETWRITE)) { - panic("DMA: nextdma_start(), dmadir arg must be DMACSR_SETREAD or DMACSR_SETWRITE"); + if (dmadir != DMACSR_SETREAD && dmadir != DMACSR_SETWRITE) { + panic("DMA: nextdma_start(), dmadir arg must be" + " DMACSR_SETREAD or DMACSR_SETWRITE"); } #endif @@ -810,7 +855,7 @@ nextdma_start(struct nextdma_softc *nsc, nextdma_rotate(nsc); #ifdef DIAGNOSTIC - if (!stat->nd_map_cont) { + if (stat->nd_map_cont == NULL) { panic("No map available in nextdma_start()"); } #endif @@ -824,25 +869,27 @@ nextdma_start(struct nextdma_softc *nsc, snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS, NEXT_I_BIT(nsc->sc_chan->nd_intr)); printf("DMA initiating DMA %s of %d segments on intr(%s)\n", - (dmadir == DMACSR_SETREAD ? "read" : "write"), stat->nd_map->dm_nsegs, sbuf); + (dmadir == DMACSR_SETREAD ? "read" : "write"), + stat->nd_map->dm_nsegs, sbuf); } #endif - nd_bsw4 (DD_CSR, (turbo ? DMACSR_INITBUFTURBO : DMACSR_INITBUF) | - DMACSR_RESET | dmadir); - nd_bsw4 (DD_CSR, 0); + nd_bsw4(DD_CSR, (turbo ? + DMACSR_INITBUFTURBO : DMACSR_INITBUF) | DMACSR_RESET | dmadir); + nd_bsw4(DD_CSR, 0); nextdma_setup_curr_regs(nsc); nextdma_setup_cont_regs(nsc); #if (defined(ND_DEBUG)) - if (NEXTDMA_DEBUG > 2) nextdma_print(nsc); + if (NEXTDMA_DEBUG > 2) + nextdma_print(nsc); #endif if (stat->nd_map_cont == NULL) { - nd_bsw4 (DD_CSR, DMACSR_SETENABLE | dmadir); + nd_bsw4(DD_CSR, DMACSR_SETENABLE | dmadir); } else { - nd_bsw4 (DD_CSR, DMACSR_SETSUPDATE | DMACSR_SETENABLE | dmadir); + nd_bsw4(DD_CSR, DMACSR_SETSUPDATE | DMACSR_SETENABLE | dmadir); } } @@ -863,19 +910,20 @@ nextdma_print(struct nextdma_softc *nsc) char sbuf[256]; struct nextdma_status *stat = &nsc->sc_stat; - /* Read all of the registers before we print anything out, + /* + * Read all of the registers before we print anything out, * in case something changes */ - dd_csr = nd_bsr4 (DD_CSR); - dd_next = nd_bsr4 (DD_NEXT); - dd_next_initbuf = nd_bsr4 (DD_NEXT_INITBUF); - dd_limit = nd_bsr4 (DD_LIMIT); - dd_start = nd_bsr4 (DD_START); - dd_stop = nd_bsr4 (DD_STOP); - dd_saved_next = nd_bsr4 (DD_SAVED_NEXT); - dd_saved_limit = nd_bsr4 (DD_SAVED_LIMIT); - dd_saved_start = nd_bsr4 (DD_SAVED_START); - dd_saved_stop = nd_bsr4 (DD_SAVED_STOP); + dd_csr = nd_bsr4(DD_CSR); + dd_next = nd_bsr4(DD_NEXT); + dd_next_initbuf = nd_bsr4(DD_NEXT_INITBUF); + dd_limit = nd_bsr4(DD_LIMIT); + dd_start = nd_bsr4(DD_START); + dd_stop = nd_bsr4(DD_STOP); + dd_saved_next = nd_bsr4(DD_SAVED_NEXT); + dd_saved_limit = nd_bsr4(DD_SAVED_LIMIT); + dd_saved_start = nd_bsr4(DD_SAVED_START); + dd_saved_stop = nd_bsr4(DD_SAVED_STOP); snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS, *(volatile u_long *)IIOV(NEXT_P_INTRSTAT)); @@ -887,49 +935,55 @@ nextdma_print(struct nextdma_softc *nsc) /* NDMAP is Next DMA Print (really!) */ - if (stat->nd_map) { + if (stat->nd_map != NULL) { int i; printf("NDMAP: nd_map->dm_mapsize = %ld\n", - stat->nd_map->dm_mapsize); + stat->nd_map->dm_mapsize); printf("NDMAP: nd_map->dm_nsegs = %d\n", - stat->nd_map->dm_nsegs); + stat->nd_map->dm_nsegs); printf("NDMAP: nd_map->dm_xfer_len = %ld\n", - stat->nd_map->dm_xfer_len); + stat->nd_map->dm_xfer_len); printf("NDMAP: nd_map->dm_segs[%d].ds_addr = 0x%08lx\n", - stat->nd_idx, stat->nd_map->dm_segs[stat->nd_idx].ds_addr); + stat->nd_idx, stat->nd_map->dm_segs[stat->nd_idx].ds_addr); printf("NDMAP: nd_map->dm_segs[%d].ds_len = %ld\n", - stat->nd_idx, stat->nd_map->dm_segs[stat->nd_idx].ds_len); + stat->nd_idx, stat->nd_map->dm_segs[stat->nd_idx].ds_len); printf("NDMAP: Entire map;\n"); - for(i=0;i<stat->nd_map->dm_nsegs;i++) { - printf("NDMAP: nd_map->dm_segs[%d].ds_addr = 0x%08lx\n", - i,stat->nd_map->dm_segs[i].ds_addr); + for(i = 0; i < stat->nd_map->dm_nsegs; i++) { + printf("NDMAP: " + "nd_map->dm_segs[%d].ds_addr = 0x%08lx\n", + i, stat->nd_map->dm_segs[i].ds_addr); printf("NDMAP: nd_map->dm_segs[%d].ds_len = %ld\n", - i,stat->nd_map->dm_segs[i].ds_len); + i, stat->nd_map->dm_segs[i].ds_len); } } else { printf("NDMAP: nd_map = NULL\n"); } - if (stat->nd_map_cont) { + if (stat->nd_map_cont != NULL) { printf("NDMAP: nd_map_cont->dm_mapsize = %ld\n", - stat->nd_map_cont->dm_mapsize); + stat->nd_map_cont->dm_mapsize); printf("NDMAP: nd_map_cont->dm_nsegs = %d\n", - stat->nd_map_cont->dm_nsegs); + stat->nd_map_cont->dm_nsegs); printf("NDMAP: nd_map_cont->dm_xfer_len = %ld\n", - stat->nd_map_cont->dm_xfer_len); + stat->nd_map_cont->dm_xfer_len); printf("NDMAP: nd_map_cont->dm_segs[%d].ds_addr = 0x%08lx\n", - stat->nd_idx_cont,stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr); + stat->nd_idx_cont, + stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr); printf("NDMAP: nd_map_cont->dm_segs[%d].ds_len = %ld\n", - stat->nd_idx_cont,stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len); + stat->nd_idx_cont, + stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len); if (stat->nd_map_cont != stat->nd_map) { int i; printf("NDMAP: Entire map;\n"); for(i=0;i<stat->nd_map_cont->dm_nsegs;i++) { - printf("NDMAP: nd_map_cont->dm_segs[%d].ds_addr = 0x%08lx\n", - i,stat->nd_map_cont->dm_segs[i].ds_addr); - printf("NDMAP: nd_map_cont->dm_segs[%d].ds_len = %ld\n", - i,stat->nd_map_cont->dm_segs[i].ds_len); + printf("NDMAP: " + "nd_map_cont->dm_segs[%d].ds_addr" + " = 0x%08lx\n", + i, stat->nd_map_cont->dm_segs[i].ds_addr); + printf("NDMAP: " + "nd_map_cont->dm_segs[%d].ds_len = %ld\n", + i, stat->nd_map_cont->dm_segs[i].ds_len); } } } else { @@ -952,7 +1006,7 @@ nextdma_print(struct nextdma_softc *nsc) snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS, NEXT_I_BIT(nsc->sc_chan->nd_intr)); printf("NDMAP: interrupt ipl (%ld) intr(%s)\n", - NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf); + NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf); } #if defined(ND_DEBUG) @@ -961,10 +1015,12 @@ nextdma_debug_initstate(struct nextdma_s { switch(nsc->sc_chan->nd_intr) { case NEXT_I_ENETR_DMA: - memset(nextdma_debug_enetr_state,0,sizeof(nextdma_debug_enetr_state)); + memset(nextdma_debug_enetr_state, 0, + sizeof(nextdma_debug_enetr_state)); break; case NEXT_I_SCSI_DMA: - memset(nextdma_debug_scsi_state,0,sizeof(nextdma_debug_scsi_state)); + memset(nextdma_debug_scsi_state, 0, + sizeof(nextdma_debug_scsi_state)); break; } } @@ -972,14 +1028,17 @@ nextdma_debug_initstate(struct nextdma_s void nextdma_debug_savestate(struct nextdma_softc *nsc, unsigned int state) { + switch(nsc->sc_chan->nd_intr) { case NEXT_I_ENETR_DMA: nextdma_debug_enetr_state[nextdma_debug_enetr_idx++] = state; - nextdma_debug_enetr_idx %= (sizeof(nextdma_debug_enetr_state)/sizeof(unsigned int)); + nextdma_debug_enetr_idx %= + (sizeof(nextdma_debug_enetr_state) / sizeof(unsigned int)); break; case NEXT_I_SCSI_DMA: nextdma_debug_scsi_state[nextdma_debug_scsi_idx++] = state; - nextdma_debug_scsi_idx %= (sizeof(nextdma_debug_scsi_state)/sizeof(unsigned int)); + nextdma_debug_scsi_idx %= + (sizeof(nextdma_debug_scsi_state) / sizeof(unsigned int)); break; } } @@ -994,11 +1053,12 @@ nextdma_debug_enetr_dumpstate(void) do { char sbuf[256]; if (nextdma_debug_enetr_state[i]) { - snprintb(sbuf, sizeof(sbuf), DMACSR_BITS, nextdma_debug_enetr_state[i]); - printf("DMA: 0x%02x state %s\n",i,sbuf); + snprintb(sbuf, sizeof(sbuf), DMACSR_BITS, + nextdma_debug_enetr_state[i]); + printf("DMA: 0x%02x state %s\n", i, sbuf); } i++; - i %= (sizeof(nextdma_debug_enetr_state)/sizeof(unsigned int)); + i %= (sizeof(nextdma_debug_enetr_state) / sizeof(unsigned int)); } while (i != nextdma_debug_enetr_idx); splx(s); } @@ -1013,13 +1073,13 @@ nextdma_debug_scsi_dumpstate(void) do { char sbuf[256]; if (nextdma_debug_scsi_state[i]) { - snprintb(sbuf, sizeof(sbuf), DMACSR_BITS, nextdma_debug_scsi_state[i]); - printf("DMA: 0x%02x state %s\n",i,sbuf); + snprintb(sbuf, sizeof(sbuf), DMACSR_BITS, + nextdma_debug_scsi_state[i]); + printf("DMA: 0x%02x state %s\n", i, sbuf); } i++; - i %= (sizeof(nextdma_debug_scsi_state)/sizeof(unsigned int)); + i %= (sizeof(nextdma_debug_scsi_state) / sizeof(unsigned int)); } while (i != nextdma_debug_scsi_idx); splx(s); } #endif - Index: src/sys/arch/next68k/dev/nextdmareg.h diff -u src/sys/arch/next68k/dev/nextdmareg.h:1.9 src/sys/arch/next68k/dev/nextdmareg.h:1.10 --- src/sys/arch/next68k/dev/nextdmareg.h:1.9 Sat Apr 24 19:58:13 2010 +++ src/sys/arch/next68k/dev/nextdmareg.h Fri Feb 3 23:06:42 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: nextdmareg.h,v 1.9 2010/04/24 19:58:13 dbj Exp $ */ +/* $NetBSD: nextdmareg.h,v 1.10 2023/02/03 23:06:42 tsutsui Exp $ */ /* * Copyright (c) 1998 Darrin B. Jewell * All rights reserved. @@ -33,23 +33,25 @@ /* from nextdev/dma.h */ #if 0 -#define DMA_BEGINALIGNMENT 4 /* initial buffer must be on long */ +#define DMA_BEGINALIGNMENT 4 /* initial buffer must be on long */ #else /* But to make cache handling easier, we put it on a cache line anyway. */ #define DMA_BEGINALIGNMENT 16 #endif -#define DMA_ENDALIGNMENT 16 /* DMA must end on quad longword */ +#define DMA_ENDALIGNMENT 16 /* DMA must end on quad longword */ #define DMA_ALIGN(type, addr) \ - ((type)(((unsigned)(addr)+DMA_BEGINALIGNMENT-1) \ - &~(DMA_BEGINALIGNMENT-1))) + ((type)(((unsigned int)(addr) + DMA_BEGINALIGNMENT - 1) \ + & ~(DMA_BEGINALIGNMENT - 1))) #define DMA_ENDALIGN(type, addr) \ - ((type)(((unsigned)(addr)+DMA_ENDALIGNMENT-1) \ - &~(DMA_ENDALIGNMENT-1))) + ((type)(((unsigned int)(addr) + DMA_ENDALIGNMENT - 1) \ + & ~(DMA_ENDALIGNMENT - 1))) -#define DMA_BEGINALIGNED(addr) (((unsigned)(addr)&(DMA_BEGINALIGNMENT-1))==0) -#define DMA_ENDALIGNED(addr) (((unsigned)(addr)&(DMA_ENDALIGNMENT-1))==0) +#define DMA_BEGINALIGNED(addr) \ + (((unsigned int)(addr) & (DMA_BEGINALIGNMENT - 1)) == 0) +#define DMA_ENDALIGNED(addr) \ + (((unsigned int)(addr) & (DMA_ENDALIGNMENT - 1))==0) #if 0 struct dma_dev { /* format of dma device registers */ @@ -69,17 +71,17 @@ struct dma_dev { /* format of dma devic #endif #define DD_CSR 0 -#define DD_SAVED_NEXT (DD_CSR +sizeof(int) + 0x3fec) -#define DD_SAVED_LIMIT (DD_SAVED_NEXT +sizeof(char *)) -#define DD_SAVED_START (DD_SAVED_LIMIT +sizeof(char *)) -#define DD_SAVED_STOP (DD_SAVED_START +sizeof(char *)) -#define DD_NEXT (DD_SAVED_STOP +sizeof(char *)) -#define DD_LIMIT (DD_NEXT +sizeof(char *)) -#define DD_START (DD_LIMIT +sizeof(char *)) -#define DD_STOP (DD_START +sizeof(char *)) -#define DD_NEXT_INITBUF (DD_STOP +sizeof(char *) + 0x1f0) +#define DD_SAVED_NEXT (DD_CSR + sizeof(int) + 0x3fec) +#define DD_SAVED_LIMIT (DD_SAVED_NEXT + sizeof(char *)) +#define DD_SAVED_START (DD_SAVED_LIMIT + sizeof(char *)) +#define DD_SAVED_STOP (DD_SAVED_START + sizeof(char *)) +#define DD_NEXT (DD_SAVED_STOP + sizeof(char *)) +#define DD_LIMIT (DD_NEXT + sizeof(char *)) +#define DD_START (DD_LIMIT + sizeof(char *)) +#define DD_STOP (DD_START + sizeof(char *)) +#define DD_NEXT_INITBUF (DD_STOP + sizeof(char *) + 0x1f0) -#define DD_SIZE (DD_NEXT_INITBUF+sizeof(char *)) +#define DD_SIZE (DD_NEXT_INITBUF + sizeof(char *)) /* * bits in dd_csr */ Index: src/sys/arch/next68k/dev/nextdmavar.h diff -u src/sys/arch/next68k/dev/nextdmavar.h:1.17 src/sys/arch/next68k/dev/nextdmavar.h:1.18 --- src/sys/arch/next68k/dev/nextdmavar.h:1.17 Tue Mar 25 19:41:32 2014 +++ src/sys/arch/next68k/dev/nextdmavar.h Fri Feb 3 23:06:42 2023 @@ -1,4 +1,4 @@ -/* $NetBSD: nextdmavar.h,v 1.17 2014/03/25 19:41:32 christos Exp $ */ +/* $NetBSD: nextdmavar.h,v 1.18 2023/02/03 23:06:42 tsutsui Exp $ */ /* * Copyright (c) 1998 Darrin B. Jewell * All rights reserved. @@ -41,14 +41,14 @@ struct nextdma_config { /* This is called when dma shuts down */ void (*nd_shutdown_cb) (void *); /* callback argument */ - void *nd_cb_arg; + void *nd_cb_arg; }; struct nextdma_status { - bus_dmamap_t nd_map; /* map currently in dd_next */ - int nd_idx; /* idx of segment currently in dd_next */ - bus_dmamap_t nd_map_cont; /* map needed to continue DMA */ - int nd_idx_cont; /* segment index to continue DMA */ + bus_dmamap_t nd_map; /* map currently in dd_next */ + int nd_idx; /* idx of segment currently in dd_next */ + bus_dmamap_t nd_map_cont; /* map needed to continue DMA */ + int nd_idx_cont; /* segment index to continue DMA */ int nd_exception; };