Module Name: src
Committed By: riastradh
Date: Sat Feb 25 18:28:57 UTC 2023
Modified Files:
src/sys/arch/x86/x86: fpu.c
Log Message:
x86/fpu.c: Sprinkle KNF.
No functional change intended.
To generate a diff of this commit:
cvs rdiff -u -r1.82 -r1.83 src/sys/arch/x86/x86/fpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/fpu.c
diff -u src/sys/arch/x86/x86/fpu.c:1.82 src/sys/arch/x86/x86/fpu.c:1.83
--- src/sys/arch/x86/x86/fpu.c:1.82 Sat Feb 25 18:04:42 2023
+++ src/sys/arch/x86/x86/fpu.c Sat Feb 25 18:28:57 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: fpu.c,v 1.82 2023/02/25 18:04:42 riastradh Exp $ */
+/* $NetBSD: fpu.c,v 1.83 2023/02/25 18:28:57 riastradh Exp $ */
/*
* Copyright (c) 2008, 2019 The NetBSD Foundation, Inc. All
@@ -96,35 +96,38 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.82 2023/02/25 18:04:42 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.83 2023/02/25 18:28:57 riastradh Exp $");
#include "opt_multiprocessor.h"
#include <sys/param.h>
-#include <sys/systm.h>
+#include <sys/types.h>
+
#include <sys/conf.h>
#include <sys/cpu.h>
#include <sys/file.h>
-#include <sys/proc.h>
#include <sys/kernel.h>
#include <sys/kthread.h>
+#include <sys/proc.h>
#include <sys/sysctl.h>
+#include <sys/systm.h>
#include <sys/xcall.h>
#include <machine/cpu.h>
-#include <machine/cpuvar.h>
+#include <machine/cpufunc.h>
#include <machine/cputypes.h>
+#include <machine/cpuvar.h>
#include <machine/intr.h>
-#include <machine/cpufunc.h>
#include <machine/pcb.h>
-#include <machine/trap.h>
#include <machine/specialreg.h>
+#include <machine/trap.h>
+
#include <x86/cpu.h>
#include <x86/fpu.h>
#ifdef XENPV
-#define clts() HYPERVISOR_fpu_taskswitch(0)
-#define stts() HYPERVISOR_fpu_taskswitch(1)
+#define clts() HYPERVISOR_fpu_taskswitch(0)
+#define stts() HYPERVISOR_fpu_taskswitch(1)
#endif
void fpu_handle_deferred(void);
@@ -179,7 +182,8 @@ fpu_save_lwp(struct lwp *l)
s = splvm();
if (l->l_md.md_flags & MDL_FPU_IN_CPU) {
KASSERT(lwp_can_haz_fpu(l));
- fpu_area_save(area, x86_xsave_features, !(l->l_proc->p_flag & PK_32));
+ fpu_area_save(area, x86_xsave_features,
+ !(l->l_proc->p_flag & PK_32));
l->l_md.md_flags &= ~MDL_FPU_IN_CPU;
}
splx(s);
@@ -192,12 +196,14 @@ fpu_save_lwp(struct lwp *l)
void
fpu_save(void)
{
+
fpu_save_lwp(curlwp);
}
void
fpuinit(struct cpu_info *ci)
{
+
/*
* This might not be strictly necessary since it will be initialized
* for each process. However it does no harm.
@@ -278,6 +284,7 @@ fpu_errata_amd(void)
void
fpu_area_save(void *area, uint64_t xsave_features, bool is_64bit)
{
+
switch (x86_fpu_save) {
case FPU_SAVE_FSAVE:
fnsave(area);
@@ -299,6 +306,7 @@ fpu_area_save(void *area, uint64_t xsave
void
fpu_area_restore(const void *area, uint64_t xsave_features, bool is_64bit)
{
+
clts();
switch (x86_fpu_save) {
@@ -323,6 +331,7 @@ void
fpu_handle_deferred(void)
{
struct pcb *pcb = lwp_getpcb(curlwp);
+
fpu_area_restore(&pcb->pcb_savefpu, x86_xsave_features,
!(curlwp->l_proc->p_flag & PK_32));
}
@@ -379,7 +388,7 @@ fpu_lwp_abandon(struct lwp *l)
splx(s);
}
-/* -------------------------------------------------------------------------- */
+/* ------------------------------------------------------------------------- */
static const union savefpu safe_fpu __aligned(64) = {
.sv_xmm = {
@@ -428,8 +437,8 @@ fpu_kern_enter(void)
ci->ci_kfpu_spl = s;
/*
- * If we are in a softint and have a pinned lwp, the fpu state is that
- * of the pinned lwp, so save it there.
+ * If we are in a softint and have a pinned lwp, the fpu state
+ * is that of the pinned lwp, so save it there.
*/
while ((l->l_pflag & LP_INTR) && (l->l_switchto != NULL))
l = l->l_switchto;
@@ -513,7 +522,7 @@ kthread_fpu_exit_md(void)
stts();
}
-/* -------------------------------------------------------------------------- */
+/* ------------------------------------------------------------------------- */
/*
* The following table is used to ensure that the FPE_... value
@@ -667,6 +676,7 @@ fpudna(struct trapframe *frame)
static inline void
fpu_xstate_reload(union savefpu *fpu_save, uint64_t xstate)
{
+
/*
* Force a reload of the given xstate during the next XRSTOR.
*/
@@ -865,6 +875,7 @@ process_read_xstate(struct lwp *l, struc
int
process_verify_xstate(const struct xstate *xstate)
{
+
/* xstate_bv must be a subset of RFBM */
if (xstate->xs_xstate_bv & ~xstate->xs_rfbm)
return EINVAL;
@@ -894,8 +905,10 @@ process_write_xstate(struct lwp *l, cons
/* Convert data into legacy FSAVE format. */
if (x86_fpu_save == FPU_SAVE_FSAVE) {
- if (xstate->xs_xstate_bv & XCR0_X87)
- process_xmm_to_s87(&xstate->xs_fxsave, &fpu_save->sv_87);
+ if (xstate->xs_xstate_bv & XCR0_X87) {
+ process_xmm_to_s87(&xstate->xs_fxsave,
+ &fpu_save->sv_87);
+ }
return 0;
}
@@ -928,15 +941,16 @@ process_write_xstate(struct lwp *l, cons
/*
* Invalid bits in mxcsr or mxcsr_mask will cause faults.
*/
- fpu_save->sv_xmm.fx_mxcsr_mask = xstate->xs_fxsave.fx_mxcsr_mask
- & x86_fpu_mxcsr_mask;
+ fpu_save->sv_xmm.fx_mxcsr_mask =
+ xstate->xs_fxsave.fx_mxcsr_mask & x86_fpu_mxcsr_mask;
fpu_save->sv_xmm.fx_mxcsr = xstate->xs_fxsave.fx_mxcsr &
fpu_save->sv_xmm.fx_mxcsr_mask;
}
if (xstate->xs_xstate_bv & XCR0_SSE) {
memcpy(&fpu_save->sv_xsave_hdr.xsh_fxsave[160],
- xstate->xs_fxsave.fx_xmm, sizeof(xstate->xs_fxsave.fx_xmm));
+ xstate->xs_fxsave.fx_xmm,
+ sizeof(xstate->xs_fxsave.fx_xmm));
}
#define COPY_COMPONENT(xcr0_val, xsave_val, field) \
