Module Name: src
Committed By: andvar
Date: Sun Jun 25 15:36:12 UTC 2023
Modified Files:
src/sys/arch/arc/jazz: jazzdmatlbreg.h
Log Message:
s/responible/responsible/ in comment.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arc/jazz/jazzdmatlbreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arc/jazz/jazzdmatlbreg.h
diff -u src/sys/arch/arc/jazz/jazzdmatlbreg.h:1.4 src/sys/arch/arc/jazz/jazzdmatlbreg.h:1.5
--- src/sys/arch/arc/jazz/jazzdmatlbreg.h:1.4 Sun Dec 11 12:16:39 2005
+++ src/sys/arch/arc/jazz/jazzdmatlbreg.h Sun Jun 25 15:36:11 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: jazzdmatlbreg.h,v 1.4 2005/12/11 12:16:39 christos Exp $ */
+/* $NetBSD: jazzdmatlbreg.h,v 1.5 2023/06/25 15:36:11 andvar Exp $ */
/* $OpenBSD: dma.h,v 1.3 1997/04/19 17:19:51 pefo Exp $ */
/*
@@ -35,7 +35,7 @@
* The R4030 system has four DMA channels capable of scatter/gather
* and full memory addressing. The maximum transfer length is 1Mb.
* DMA snopes the L2 cache so no precaution is required. However
- * if L1 cache is cached 'write back' the processor is responible
+ * if L1 cache is cached 'write back' the processor is responsible
* for flushing/invalidating it.
*
* The DMA mapper has up to 4096 page descriptors.
