Module Name: src
Committed By: nisimura
Date: Tue Jun 27 21:43:58 UTC 2023
Modified Files:
src/sys/dev/pci: if_bce.c if_bcereg.h
Log Message:
correct register function annotation as it's for receive coalesce.
To generate a diff of this commit:
cvs rdiff -u -r1.62 -r1.63 src/sys/dev/pci/if_bce.c
cvs rdiff -u -r1.5 -r1.6 src/sys/dev/pci/if_bcereg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/if_bce.c
diff -u src/sys/dev/pci/if_bce.c:1.62 src/sys/dev/pci/if_bce.c:1.63
--- src/sys/dev/pci/if_bce.c:1.62 Sun Sep 25 12:41:46 2022
+++ src/sys/dev/pci/if_bce.c Tue Jun 27 21:43:58 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bce.c,v 1.62 2022/09/25 12:41:46 andvar Exp $ */
+/* $NetBSD: if_bce.c,v 1.63 2023/06/27 21:43:58 nisimura Exp $ */
/*
* Copyright (c) 2003 Clifford Wright. All rights reserved.
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bce.c,v 1.62 2022/09/25 12:41:46 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bce.c,v 1.63 2023/06/27 21:43:58 nisimura Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -928,7 +928,7 @@ bce_init(struct ifnet *ifp)
bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL) &
~BCE_EMC_PDOWN);
- /* setup DMA interrupt control */
+ /* recv coalesce; 31:24 frame upper bound, 23:0 guard period */
bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMAI_CTL, 1 << 24); /* MAGIC */
/* setup packet filter */
Index: src/sys/dev/pci/if_bcereg.h
diff -u src/sys/dev/pci/if_bcereg.h:1.5 src/sys/dev/pci/if_bcereg.h:1.6
--- src/sys/dev/pci/if_bcereg.h:1.5 Fri Oct 18 23:08:29 2019
+++ src/sys/dev/pci/if_bcereg.h Tue Jun 27 21:43:58 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bcereg.h,v 1.5 2019/10/18 23:08:29 msaitoh Exp $ */
+/* $NetBSD: if_bcereg.h,v 1.6 2023/06/27 21:43:58 nisimura Exp $ */
/*
* Copyright (c) 2003 Clifford Wright. All rights reserved.
@@ -76,7 +76,7 @@
#define BCE_EMC_EDET 0x00000008 /* PHY energy detect */
#define BCE_EMC_LED 0x000000e0 /* PHY LED control */
-/* DMA Interrupt control */
+/* recv coalesce; 31:24 frame upper bound, 23:0 guard period */
#define BCE_DMAI_CTL 0x0100
/* DMA registers */
