Module Name: src
Committed By: riastradh
Date: Thu Jul 13 19:42:24 UTC 2023
Modified Files:
src/sys/arch/arm/xscale: pxa2x0_intr.c pxa2x0_intr.h
src/sys/arch/evbarm/g42xxeb: obio.c
src/sys/arch/evbarm/lubbock: obio.c sacc_obio.c
Log Message:
arm/xscale: Use sys/bitops.h fls32 - 1 instead of 31 - __builtin_clz.
Sidesteps namespace collision with `#define bits ...' in net/zlib.c.
To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/xscale/pxa2x0_intr.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/xscale/pxa2x0_intr.h
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/evbarm/g42xxeb/obio.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/evbarm/lubbock/obio.c
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/evbarm/lubbock/sacc_obio.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/xscale/pxa2x0_intr.c
diff -u src/sys/arch/arm/xscale/pxa2x0_intr.c:1.25 src/sys/arch/arm/xscale/pxa2x0_intr.c:1.26
--- src/sys/arch/arm/xscale/pxa2x0_intr.c:1.25 Mon Oct 31 21:22:05 2022
+++ src/sys/arch/arm/xscale/pxa2x0_intr.c Thu Jul 13 19:42:24 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pxa2x0_intr.c,v 1.25 2022/10/31 21:22:05 andvar Exp $ */
+/* $NetBSD: pxa2x0_intr.c,v 1.26 2023/07/13 19:42:24 riastradh Exp $ */
/*
* Copyright (c) 2002 Genetec Corporation. All rights reserved.
@@ -39,12 +39,14 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pxa2x0_intr.c,v 1.25 2022/10/31 21:22:05 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pxa2x0_intr.c,v 1.26 2023/07/13 19:42:24 riastradh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
+#include <sys/bitops.h>
+
#include <machine/intr.h>
#include <machine/lock.h>
@@ -161,7 +163,7 @@ pxa2x0_irq_handler(void *arg)
/* get pending IRQs */
irqbits = read_icu(SAIPIC_IP);
- while ((irqno = find_first_bit(irqbits)) >= 0) {
+ while ((irqno = fls32(irqbits) - 1) >= 0) {
/* XXX: Should we handle IRQs in priority order? */
/* raise spl to stop interrupts of lower priorities */
Index: src/sys/arch/arm/xscale/pxa2x0_intr.h
diff -u src/sys/arch/arm/xscale/pxa2x0_intr.h:1.15 src/sys/arch/arm/xscale/pxa2x0_intr.h:1.16
--- src/sys/arch/arm/xscale/pxa2x0_intr.h:1.15 Wed Jan 24 09:04:45 2018
+++ src/sys/arch/arm/xscale/pxa2x0_intr.h Thu Jul 13 19:42:24 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pxa2x0_intr.h,v 1.15 2018/01/24 09:04:45 skrll Exp $ */
+/* $NetBSD: pxa2x0_intr.h,v 1.16 2023/07/13 19:42:24 riastradh Exp $ */
/* Derived from i80321_intr.h */
@@ -114,21 +114,6 @@ pxa2x0_spllower(int ipl)
return old;
}
-/*
- * An useful function for interrupt handlers.
- * XXX: This shouldn't be here.
- */
-static inline int
-find_first_bit(uint32_t bits)
-{
- /*
- * Since CLZ is available only on ARMv5, this isn't portable
- * to all ARM CPUs. This file is for PXA2[15]0 processor.
- */
- return 31 - __builtin_clz(bits);
-}
-
-
int _splraise(int);
int _spllower(int);
void splx(int);
Index: src/sys/arch/evbarm/g42xxeb/obio.c
diff -u src/sys/arch/evbarm/g42xxeb/obio.c:1.13 src/sys/arch/evbarm/g42xxeb/obio.c:1.14
--- src/sys/arch/evbarm/g42xxeb/obio.c:1.13 Sat Aug 7 16:18:49 2021
+++ src/sys/arch/evbarm/g42xxeb/obio.c Thu Jul 13 19:42:24 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: obio.c,v 1.13 2021/08/07 16:18:49 thorpej Exp $ */
+/* $NetBSD: obio.c,v 1.14 2023/07/13 19:42:24 riastradh Exp $ */
/*
* Copyright (c) 2002, 2003, 2005 Genetec corp. All rights reserved.
@@ -35,6 +35,7 @@
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/reboot.h>
+#include <sys/bitops.h>
#include <machine/cpu.h>
#include <sys/bus.h>
@@ -98,7 +99,7 @@ obio_intr(void *arg)
#endif
for (pending = get_pending(sc);
- (irqno = find_first_bit(pending)) >= 0;
+ (irqno = fls32(pending) - 1) >= 0;
pending = get_pending(sc)) {
/* reset pending bit */
Index: src/sys/arch/evbarm/lubbock/obio.c
diff -u src/sys/arch/evbarm/lubbock/obio.c:1.12 src/sys/arch/evbarm/lubbock/obio.c:1.13
--- src/sys/arch/evbarm/lubbock/obio.c:1.12 Sat Aug 7 16:18:50 2021
+++ src/sys/arch/evbarm/lubbock/obio.c Thu Jul 13 19:42:24 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: obio.c,v 1.12 2021/08/07 16:18:50 thorpej Exp $ */
+/* $NetBSD: obio.c,v 1.13 2023/07/13 19:42:24 riastradh Exp $ */
/*
* Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
@@ -35,13 +35,14 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.12 2021/08/07 16:18:50 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.13 2023/07/13 19:42:24 riastradh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/reboot.h>
+#include <sys/bitops.h>
#include <machine/cpu.h>
#include <sys/bus.h>
@@ -163,7 +164,7 @@ obio_softintr(void *arg)
int spl_save = curcpl();
psw = disable_interrupts(I32_bit);
- while ((irqno = find_first_bit(sc->sc_obio_intr_pending)) >= 0) {
+ while ((irqno = fls32(sc->sc_obio_intr_pending) - 1) >= 0) {
sc->sc_obio_intr_pending &= ~(1U<<irqno);
restore_interrupts(psw);
Index: src/sys/arch/evbarm/lubbock/sacc_obio.c
diff -u src/sys/arch/evbarm/lubbock/sacc_obio.c:1.15 src/sys/arch/evbarm/lubbock/sacc_obio.c:1.16
--- src/sys/arch/evbarm/lubbock/sacc_obio.c:1.15 Sat Aug 7 16:18:50 2021
+++ src/sys/arch/evbarm/lubbock/sacc_obio.c Thu Jul 13 19:42:24 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: sacc_obio.c,v 1.15 2021/08/07 16:18:50 thorpej Exp $ */
+/* $NetBSD: sacc_obio.c,v 1.16 2023/07/13 19:42:24 riastradh Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,v 1.15 2021/08/07 16:18:50 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,v 1.16 2023/07/13 19:42:24 riastradh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -45,6 +45,7 @@ __KERNEL_RCSID(0, "$NetBSD: sacc_obio.c,
#include <sys/syslog.h>
#include <sys/select.h>
#include <sys/device.h>
+#include <sys/bitops.h>
#include <net/if.h>
#include <net/if_dl.h>
@@ -197,7 +198,7 @@ sacc_obio_intr(void *arg)
bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1);
DPRINTF(("sacc_obio_intr_dispatch: %x %x\n", intstat.lo, intstat.hi));
- while ((i = find_first_bit(intstat.lo)) >= 0) {
+ while ((i = fls32(intstat.lo) - 1) >= 0) {
/*
* Clear intr status before calling intr handlers.
