Module Name: src
Committed By: msaitoh
Date: Mon Aug 7 06:23:40 UTC 2023
Modified Files:
src/sys/arch/x86/pci: pci_machdep.c
Log Message:
Fix detection of availability of MSI/MSI-X on some systems.
Try to find all functions on bus 0, device 0 to find a PCI host bridge.
Some CPU's host bridge is at 0:0.4. Tested by Intel Snow Ridge.
To generate a diff of this commit:
cvs rdiff -u -r1.93 -r1.94 src/sys/arch/x86/pci/pci_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/pci_machdep.c
diff -u src/sys/arch/x86/pci/pci_machdep.c:1.93 src/sys/arch/x86/pci/pci_machdep.c:1.94
--- src/sys/arch/x86/pci/pci_machdep.c:1.93 Tue Sep 6 01:44:24 2022
+++ src/sys/arch/x86/pci/pci_machdep.c Mon Aug 7 06:23:39 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.c,v 1.93 2022/09/06 01:44:24 msaitoh Exp $ */
+/* $NetBSD: pci_machdep.c,v 1.94 2023/08/07 06:23:39 msaitoh Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -73,7 +73,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.93 2022/09/06 01:44:24 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.94 2023/08/07 06:23:39 msaitoh Exp $");
#include <sys/types.h>
#include <sys/param.h>
@@ -485,6 +485,8 @@ pci_attach_hook(device_t parent, device_
pci_chipset_tag_t pc = pba->pba_pc;
pcitag_t tag;
pcireg_t id, class;
+ int i;
+ bool havehb = false;
#endif
if (pba->pba_bus == 0)
@@ -502,19 +504,25 @@ pci_attach_hook(device_t parent, device_
#ifdef __HAVE_PCI_MSI_MSIX
/*
* In order to decide whether the system supports MSI we look
- * at the host bridge, which should be device 0 function 0 on
- * bus 0. It is better to not enable MSI on systems that
+ * at the host bridge, which should be device 0 on bus 0.
+ * It is better to not enable MSI on systems that
* support it than the other way around, so be conservative
* here. So we don't enable MSI if we don't find a host
* bridge there. We also deliberately don't enable MSI on
* chipsets from low-end manifacturers like VIA and SiS.
*/
- tag = pci_make_tag(pc, 0, 0, 0);
- id = pci_conf_read(pc, tag, PCI_ID_REG);
- class = pci_conf_read(pc, tag, PCI_CLASS_REG);
-
- if (PCI_CLASS(class) != PCI_CLASS_BRIDGE ||
- PCI_SUBCLASS(class) != PCI_SUBCLASS_BRIDGE_HOST)
+ for (i = 0; i <= 7; i++) {
+ tag = pci_make_tag(pc, 0, 0, i);
+ id = pci_conf_read(pc, tag, PCI_ID_REG);
+ class = pci_conf_read(pc, tag, PCI_CLASS_REG);
+
+ if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
+ PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_HOST) {
+ havehb = true;
+ break;
+ }
+ }
+ if (havehb == false)
return;
/* VMware and KVM use old chipset, but they can use MSI/MSI-X */
