Module Name: src
Committed By: andvar
Date: Thu Aug 10 06:23:28 UTC 2023
Modified Files:
src/sys/dev/pci: pcidevs.h pcidevs_data.h
Log Message:
regen.
To generate a diff of this commit:
cvs rdiff -u -r1.1472 -r1.1473 src/sys/dev/pci/pcidevs.h
cvs rdiff -u -r1.1471 -r1.1472 src/sys/dev/pci/pcidevs_data.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/pcidevs.h
diff -u src/sys/dev/pci/pcidevs.h:1.1472 src/sys/dev/pci/pcidevs.h:1.1473
--- src/sys/dev/pci/pcidevs.h:1.1472 Wed Aug 9 09:58:00 2023
+++ src/sys/dev/pci/pcidevs.h Thu Aug 10 06:23:27 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pcidevs.h,v 1.1472 2023/08/09 09:58:00 msaitoh Exp $ */
+/* $NetBSD: pcidevs.h,v 1.1473 2023/08/10 06:23:27 andvar Exp $ */
/*
* THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
@@ -9941,7 +9941,7 @@
#define PCI_PRODUCT_VIATECH_VX900_PCIE_1 0xb410 /* VX900 PCI Express Root Port 1 */
#define PCI_PRODUCT_VIATECH_VT3237_PPB 0xb999 /* K8T890 North / VT8237 South PCI-PCI Bridge */
#define PCI_PRODUCT_VIATECH_K8T890_PPB_C238 0xc238 /* K8T890 PCI-PCI Bridge */
-#define PCI_PRODUCT_VIATECH_VX800_PCI_G0 0xc353 /* VX800/VX820 PCI Express Root Port G0 */
+#define PCI_PRODUCT_VIATECH_VX800_PCIE_G0 0xc353 /* VX800/VX820 PCI Express Root Port G0 */
#define PCI_PRODUCT_VIATECH_P4M900_PPB_2 0xc364 /* CN896/P4M900 PCI-PCI Bridge */
#define PCI_PRODUCT_VIATECH_VX900_PCIE_2 0xc410 /* VX900 PCI Express Root Port 2 */
#define PCI_PRODUCT_VIATECH_K8T890_PPB_D238 0xd238 /* K8T890 PCI-PCI Bridge */
Index: src/sys/dev/pci/pcidevs_data.h
diff -u src/sys/dev/pci/pcidevs_data.h:1.1471 src/sys/dev/pci/pcidevs_data.h:1.1472
--- src/sys/dev/pci/pcidevs_data.h:1.1471 Wed Aug 9 09:58:00 2023
+++ src/sys/dev/pci/pcidevs_data.h Thu Aug 10 06:23:27 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: pcidevs_data.h,v 1.1471 2023/08/09 09:58:00 msaitoh Exp $ */
+/* $NetBSD: pcidevs_data.h,v 1.1472 2023/08/10 06:23:27 andvar Exp $ */
/*
* THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
@@ -17989,7 +17989,7 @@ static const uint32_t pci_products[] = {
41543, 8360, 2173, 42050, 8644, 8725, 6521, 0,
PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_PPB_C238,
41543, 8725, 6521, 0,
- PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_PCI_G0,
+ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_PCIE_G0,
41591, 615, 4320, 8083, 8096, 42380, 0,
PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_PPB_2,
41603, 8725, 6521, 0,
