Module Name: src
Committed By: rin
Date: Sat Oct 7 12:10:18 UTC 2023
Modified Files:
src/external/gpl3/gcc.old/dist/gcc/config/vax: vax.md
Log Message:
gcc.old: vax: PR port-vax/57646 patch provided by Kalvis Duckmanton [19/21]
If in PIC mode, and the source operand to insv is a memory reference,
and the address of the memory location is an external symbol, load the
address into a temporary register before expanding the instruction.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 \
src/external/gpl3/gcc.old/dist/gcc/config/vax/vax.md
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/external/gpl3/gcc.old/dist/gcc/config/vax/vax.md
diff -u src/external/gpl3/gcc.old/dist/gcc/config/vax/vax.md:1.15 src/external/gpl3/gcc.old/dist/gcc/config/vax/vax.md:1.16
--- src/external/gpl3/gcc.old/dist/gcc/config/vax/vax.md:1.15 Sat Oct 7 12:10:02 2023
+++ src/external/gpl3/gcc.old/dist/gcc/config/vax/vax.md Sat Oct 7 12:10:18 2023
@@ -1058,12 +1058,36 @@
}")
(define_expand "insv"
- [(set (zero_extract:SI (match_operand:SI 0 "general_operand" "")
+ [(set (zero_extract:SI (match_dup 4)
(match_operand:QI 1 "general_operand" "")
(match_operand:SI 2 "general_operand" ""))
(match_operand:SI 3 "general_operand" ""))]
""
- "")
+ "{
+ /*
+ * If the destination operand is a memory reference, and the address
+ * is a symbol, and we're in PIC mode, load the address into a
+ * register. Don't evaluate the field start or width at this time.
+ */
+ operands[4] = operands[0];
+ if (flag_pic
+ /* && !reload_completed */
+ && MEM_P (operands[0])
+ && !mode_dependent_address_p (XEXP (operands[0], 0),
+ MEM_ADDR_SPACE (operands[0]))
+ && SYMBOL_REF_P (XEXP (operands[0], 0))
+ && !SYMBOL_REF_LOCAL_P (XEXP (operands[0], 0))
+ )
+ {
+ rtx address = XEXP (operands[0], 0);
+ rtx temp = gen_reg_rtx (Pmode);
+ emit_move_insn (temp, address);
+ /* copy the original memory reference, replacing the address */
+ operands[4] = change_address (operands[0], VOIDmode, temp);
+ set_mem_align (operands[4], MEM_ALIGN (operands[0]));
+ }
+
+ }")
(define_insn ""
[(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+g")
