Module Name: src
Committed By: rin
Date: Tue Nov 7 13:38:01 UTC 2023
Modified Files:
src/sys/dev/pci: virtio.c
Log Message:
virtio_read_device_config_le_[24]: Fix for {aarch64,arm}eb
Stop byte-swapping for big-endian aarch64 and arm to fix
corrupted read for, e.g., sc_taglen for vio9p(4).
As described as comments in virtio_pci.c, big-endian aarch64 and
armv7 (armeb) are somewhat special. At the moment, all supported
virtual/real machines are configured as little-endian, and only
CPU cores are switched to big-endian mode during early boot stage.
Most peripheral buses for armeb are LSB as a result, and their
default bus_space(9) functions swap byte-order. Therefore, PIOed
data from memory-mapped devices, as well as pci(4) ones, are
actually LSB, but observed as MSB for armeb.
Therefore, we should not swap byte-order further in
virtio_read_device_config_le_[24] on armeb.
Thanks ozaki-r@ for comments.
XXX Centralize?
See virtio_pci.c and sys/dev/fdt/virtio_mmio_fdt.c also.
To generate a diff of this commit:
cvs rdiff -u -r1.78 -r1.79 src/sys/dev/pci/virtio.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/virtio.c
diff -u src/sys/dev/pci/virtio.c:1.78 src/sys/dev/pci/virtio.c:1.79
--- src/sys/dev/pci/virtio.c:1.78 Fri Apr 21 02:17:32 2023
+++ src/sys/dev/pci/virtio.c Tue Nov 7 13:38:01 2023
@@ -1,4 +1,4 @@
-/* $NetBSD: virtio.c,v 1.78 2023/04/21 02:17:32 yamaguchi Exp $ */
+/* $NetBSD: virtio.c,v 1.79 2023/11/07 13:38:01 rin Exp $ */
/*
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -28,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: virtio.c,v 1.78 2023/04/21 02:17:32 yamaguchi Exp $");
+__KERNEL_RCSID(0, "$NetBSD: virtio.c,v 1.79 2023/11/07 13:38:01 rin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -276,8 +276,15 @@ virtio_read_device_config_le_2(struct vi
uint16_t val;
val = bus_space_read_2(iot, ioh, index);
+#if !defined(__aarch64__) && !defined(__arm__)
+ /*
+ * For big-endian aarch64/armv7, bus endian is always LSB, but
+ * byte-order is automatically swapped by bus_space(9) (see also
+ * comments in virtio_pci.c). Therefore, no need to swap here.
+ */
if (sc->sc_bus_endian != LITTLE_ENDIAN)
val = bswap16(val);
+#endif
DPRINTFR("read_le_2", "%04x", val, index, 2);
DPRINTFR2("read_le_2", "%04x",
@@ -294,8 +301,11 @@ virtio_read_device_config_le_4(struct vi
uint32_t val;
val = bus_space_read_4(iot, ioh, index);
+#if !defined(__aarch64__) && !defined(__arm__)
+ /* See virtio_read_device_config_le_2() above. */
if (sc->sc_bus_endian != LITTLE_ENDIAN)
val = bswap32(val);
+#endif
DPRINTFR("read_le_4", "%08x", val, index, 4);
DPRINTFR2("read_le_4", "%08x",
