Module Name: src Committed By: bouyer Date: Sun Nov 26 12:35:26 UTC 2023
Modified Files: src/external/gpl3/binutils.old/dist/gas/config [netbsd-10]: tc-mips.c src/external/gpl3/binutils/dist/gas/config [netbsd-10]: tc-mips.c Log Message: Pull up following revision(s) (requested by tsutsui in ticket #469): external/gpl3/binutils/dist/gas/config/tc-mips.c: revision 1.25 external/gpl3/binutils.old/dist/gas/config/tc-mips.c: revision 1.8 binutils: fix gas that doesn't handle MIPS1 FPR load hazard correctly. Fixes PR/57680. Should be pulled up to netbsd-10, netbsd-9, and netbsd-8. binutils.old: apply the same fix for mips gas from binutils. binutils: fix gas that doesn't handle MIPS1 FPR load hazard correctly. Fixes PR/57680. To generate a diff of this commit: cvs rdiff -u -r1.6 -r1.6.6.1 \ src/external/gpl3/binutils.old/dist/gas/config/tc-mips.c cvs rdiff -u -r1.22 -r1.22.6.1 \ src/external/gpl3/binutils/dist/gas/config/tc-mips.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/external/gpl3/binutils.old/dist/gas/config/tc-mips.c diff -u src/external/gpl3/binutils.old/dist/gas/config/tc-mips.c:1.6 src/external/gpl3/binutils.old/dist/gas/config/tc-mips.c:1.6.6.1 --- src/external/gpl3/binutils.old/dist/gas/config/tc-mips.c:1.6 Fri Apr 3 17:51:09 2020 +++ src/external/gpl3/binutils.old/dist/gas/config/tc-mips.c Sun Nov 26 12:35:26 2023 @@ -6440,8 +6440,8 @@ insns_between (const struct mips_cl_insn /* Itbl support may require additional care here. FIXME! Need to modify this to include knowledge about user specified delays! */ - else if ((!cop_interlocks && (pinfo1 & INSN_COPROC_MOVE)) - || (!cop_mem_interlocks && (pinfo1 & INSN_COPROC_MEMORY_DELAY))) + if ((!cop_interlocks && (pinfo1 & INSN_COPROC_MOVE)) + || (!cop_mem_interlocks && (pinfo1 & INSN_COPROC_MEMORY_DELAY))) { /* Handle cases where INSN1 writes to a known general coprocessor register. There must be a one instruction delay before INSN2 Index: src/external/gpl3/binutils/dist/gas/config/tc-mips.c diff -u src/external/gpl3/binutils/dist/gas/config/tc-mips.c:1.22 src/external/gpl3/binutils/dist/gas/config/tc-mips.c:1.22.6.1 --- src/external/gpl3/binutils/dist/gas/config/tc-mips.c:1.22 Fri Apr 3 23:48:47 2020 +++ src/external/gpl3/binutils/dist/gas/config/tc-mips.c Sun Nov 26 12:35:26 2023 @@ -6529,8 +6529,8 @@ insns_between (const struct mips_cl_insn /* Itbl support may require additional care here. FIXME! Need to modify this to include knowledge about user specified delays! */ - else if ((!cop_interlocks && (pinfo1 & INSN_COPROC_MOVE)) - || (!cop_mem_interlocks && (pinfo1 & INSN_COPROC_MEMORY_DELAY))) + if ((!cop_interlocks && (pinfo1 & INSN_COPROC_MOVE)) + || (!cop_mem_interlocks && (pinfo1 & INSN_COPROC_MEMORY_DELAY))) { /* Handle cases where INSN1 writes to a known general coprocessor register. There must be a one instruction delay before INSN2