Module Name: src
Committed By: thorpej
Date: Sun Jan 14 22:34:55 UTC 2024
Modified Files:
src/sys/arch/sun2/sun2: genassym.cf locore.s
src/sys/arch/sun3/sun3: genassym.cf locore.s
src/sys/arch/sun3/sun3x: genassym.cf locore.s
src/sys/arch/sun68k/conf: files.sun68k
src/sys/arch/sun68k/include: intr.h types.h vectors.h
Removed Files:
src/sys/arch/sun68k/sun68k: isr.c
Log Message:
Switch the sun68k platforms over to the common m68k interrupt dispatch code.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/sun2/sun2/genassym.cf
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/sun2/sun2/locore.s
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/sun3/sun3/genassym.cf
cvs rdiff -u -r1.105 -r1.106 src/sys/arch/sun3/sun3/locore.s
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/sun3/sun3x/genassym.cf
cvs rdiff -u -r1.73 -r1.74 src/sys/arch/sun3/sun3x/locore.s
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/sun68k/conf/files.sun68k
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/sun68k/include/intr.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/sun68k/include/types.h \
src/sys/arch/sun68k/include/vectors.h
cvs rdiff -u -r1.31 -r0 src/sys/arch/sun68k/sun68k/isr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sun2/sun2/genassym.cf
diff -u src/sys/arch/sun2/sun2/genassym.cf:1.15 src/sys/arch/sun2/sun2/genassym.cf:1.16
--- src/sys/arch/sun2/sun2/genassym.cf:1.15 Wed Dec 27 17:35:36 2023
+++ src/sys/arch/sun2/sun2/genassym.cf Sun Jan 14 22:34:54 2024
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.15 2023/12/27 17:35:36 thorpej Exp $
+# $NetBSD: genassym.cf,v 1.16 2024/01/14 22:34:54 thorpej Exp $
#
# Copyright (c) 1982, 1990, 1993
@@ -93,6 +93,9 @@ include <dev/ic/am9513reg.h>
# XXX: for copy.s
define M68010 1
+# for m68k_intr.c / m68k_intr_stubs.s
+define __HAVE_M68K_INTR_VECTORED 1
+
# bus error stuff
define BUSERR_REG BUSERR_REG
define BUSERR_PROTERR BUSERR_PROTERR
Index: src/sys/arch/sun2/sun2/locore.s
diff -u src/sys/arch/sun2/sun2/locore.s:1.33 src/sys/arch/sun2/sun2/locore.s:1.34
--- src/sys/arch/sun2/sun2/locore.s:1.33 Sat Jan 13 00:21:51 2024
+++ src/sys/arch/sun2/sun2/locore.s Sun Jan 14 22:34:54 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.33 2024/01/13 00:21:51 thorpej Exp $ */
+/* $NetBSD: locore.s,v 1.34 2024/01/14 22:34:54 thorpej Exp $ */
/*
* Copyright (c) 1980, 1990, 1993
@@ -399,22 +399,6 @@ Lbrkpt2:
* %d0,%d1,%a0,%a1, sr, pc, vo
*/
-/*
- * This is the common auto-vector interrupt handler,
- * for which the CPU provides the vector=0x18+level.
- * These are installed in the interrupt vector table.
- */
-#ifdef __ELF__
- .align 4
-#else
- .align 2
-#endif
-GLOBAL(_isr_autovec)
- INTERRUPT_SAVEREG
- jbsr _C_LABEL(isr_autovec)
- INTERRUPT_RESTOREREG
- jra _ASM_LABEL(rei)
-
/* clock: see clock.c */
#ifdef __ELF__
.align 4
@@ -427,18 +411,6 @@ GLOBAL(_isr_clock)
INTERRUPT_RESTOREREG
jra _ASM_LABEL(rei)
-| Handler for all vectored interrupts (i.e. VME interrupts)
-#ifdef __ELF__
- .align 4
-#else
- .align 2
-#endif
-GLOBAL(_isr_vectored)
- INTERRUPT_SAVEREG
- jbsr _C_LABEL(isr_vectored)
- INTERRUPT_RESTOREREG
- jra _ASM_LABEL(rei)
-
/* interrupt counters (needed by vmstat) */
GLOBAL(intrnames)
.asciz "spur" | 0
Index: src/sys/arch/sun3/sun3/genassym.cf
diff -u src/sys/arch/sun3/sun3/genassym.cf:1.20 src/sys/arch/sun3/sun3/genassym.cf:1.21
--- src/sys/arch/sun3/sun3/genassym.cf:1.20 Wed Dec 27 17:35:37 2023
+++ src/sys/arch/sun3/sun3/genassym.cf Sun Jan 14 22:34:54 2024
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.20 2023/12/27 17:35:37 thorpej Exp $
+# $NetBSD: genassym.cf,v 1.21 2024/01/14 22:34:54 thorpej Exp $
#
# Copyright (c) 1982, 1990, 1993
@@ -93,6 +93,9 @@ include <sun3/sun3/enable.h>
# XXX: for copy.s
define M68020 1
+# for m68k_intr.c / m68k_intr_stubs.s
+define __HAVE_M68K_INTR_VECTORED 1
+
# 68k isms
define PSL_LOWIPL PSL_LOWIPL
define PSL_HIGHIPL PSL_HIGHIPL
Index: src/sys/arch/sun3/sun3/locore.s
diff -u src/sys/arch/sun3/sun3/locore.s:1.105 src/sys/arch/sun3/sun3/locore.s:1.106
--- src/sys/arch/sun3/sun3/locore.s:1.105 Sat Jan 13 00:21:51 2024
+++ src/sys/arch/sun3/sun3/locore.s Sun Jan 14 22:34:54 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.105 2024/01/13 00:21:51 thorpej Exp $ */
+/* $NetBSD: locore.s,v 1.106 2024/01/14 22:34:54 thorpej Exp $ */
/*
* Copyright (c) 1980, 1990, 1993
@@ -445,22 +445,6 @@ Lbrkpt2:
* %d0,%d1,%a0,%a1, sr, pc, vo
*/
-/*
- * This is the common auto-vector interrupt handler,
- * for which the CPU provides the vector=0x18+level.
- * These are installed in the interrupt vector table.
- */
-#ifdef __ELF__
- .align 4
-#else
- .align 2
-#endif
-GLOBAL(_isr_autovec)
- INTERRUPT_SAVEREG
- jbsr _C_LABEL(isr_autovec)
- INTERRUPT_RESTOREREG
- jra _ASM_LABEL(rei)
-
/* clock: see clock.c */
#ifdef __ELF__
.align 4
@@ -473,18 +457,6 @@ GLOBAL(_isr_clock)
INTERRUPT_RESTOREREG
jra _ASM_LABEL(rei)
-| Handler for all vectored interrupts (i.e. VME interrupts)
-#ifdef __ELF__
- .align 4
-#else
- .align 2
-#endif
-GLOBAL(_isr_vectored)
- INTERRUPT_SAVEREG
- jbsr _C_LABEL(isr_vectored)
- INTERRUPT_RESTOREREG
- jra _ASM_LABEL(rei)
-
/* interrupt counters (needed by vmstat) */
GLOBAL(intrnames)
.asciz "spur" | 0
Index: src/sys/arch/sun3/sun3x/genassym.cf
diff -u src/sys/arch/sun3/sun3x/genassym.cf:1.17 src/sys/arch/sun3/sun3x/genassym.cf:1.18
--- src/sys/arch/sun3/sun3x/genassym.cf:1.17 Wed Dec 27 17:35:37 2023
+++ src/sys/arch/sun3/sun3x/genassym.cf Sun Jan 14 22:34:54 2024
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.17 2023/12/27 17:35:37 thorpej Exp $
+# $NetBSD: genassym.cf,v 1.18 2024/01/14 22:34:54 thorpej Exp $
#
# Copyright (c) 1982, 1990, 1993
@@ -92,6 +92,9 @@ include <sun3/sun3x/enable.h>
# XXX: for copy.s
define M68030 1
+# for m68k_intr.c / m68k_intr_stubs.s
+define __HAVE_M68K_INTR_VECTORED 1
+
# bus error stuff XXX
# define BUSERR_REG BUSERR_REG
# define BUSERR_MMU BUSERR_MMU
Index: src/sys/arch/sun3/sun3x/locore.s
diff -u src/sys/arch/sun3/sun3x/locore.s:1.73 src/sys/arch/sun3/sun3x/locore.s:1.74
--- src/sys/arch/sun3/sun3x/locore.s:1.73 Sat Jan 13 00:21:51 2024
+++ src/sys/arch/sun3/sun3x/locore.s Sun Jan 14 22:34:54 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.73 2024/01/13 00:21:51 thorpej Exp $ */
+/* $NetBSD: locore.s,v 1.74 2024/01/14 22:34:54 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -430,22 +430,6 @@ Lbrkpt2:
* %d0,%d1,%a0,%a1, sr, pc, vo
*/
-/*
- * This is the common auto-vector interrupt handler,
- * for which the CPU provides the vector=0x18+level.
- * These are installed in the interrupt vector table.
- */
-#ifdef __ELF__
- .align 4
-#else
- .align 2
-#endif
-GLOBAL(_isr_autovec)
- INTERRUPT_SAVEREG
- jbsr _C_LABEL(isr_autovec)
- INTERRUPT_RESTOREREG
- jra _ASM_LABEL(rei)
-
/* clock: see clock.c */
#ifdef __ELF__
.align 4
@@ -458,18 +442,6 @@ GLOBAL(_isr_clock)
INTERRUPT_RESTOREREG
jra _ASM_LABEL(rei)
-| Handler for all vectored interrupts (i.e. VME interrupts)
-#ifdef __ELF__
- .align 4
-#else
- .align 2
-#endif
-GLOBAL(_isr_vectored)
- INTERRUPT_SAVEREG
- jbsr _C_LABEL(isr_vectored)
- INTERRUPT_RESTOREREG
- jra _ASM_LABEL(rei)
-
/* interrupt counters (needed by vmstat) */
GLOBAL(intrnames)
.asciz "spur" | 0
Index: src/sys/arch/sun68k/conf/files.sun68k
diff -u src/sys/arch/sun68k/conf/files.sun68k:1.6 src/sys/arch/sun68k/conf/files.sun68k:1.7
--- src/sys/arch/sun68k/conf/files.sun68k:1.6 Sat Jan 13 18:51:38 2024
+++ src/sys/arch/sun68k/conf/files.sun68k Sun Jan 14 22:34:54 2024
@@ -1,4 +1,4 @@
-# $NetBSD: files.sun68k,v 1.6 2024/01/13 18:51:38 thorpej Exp $
+# $NetBSD: files.sun68k,v 1.7 2024/01/14 22:34:54 thorpej Exp $
#
# common sun68k configuration info
@@ -8,11 +8,12 @@
file arch/sun68k/sun68k/autoconf.c _sun2_ # XXX not yet merged
file arch/sun68k/sun68k/bus.c
file arch/sun68k/sun68k/ctrlsp.S !_sun3x_
-file arch/sun68k/sun68k/isr.c
file arch/sun68k/sun68k/stub.c
file arch/m68k/m68k/kgdb_machdep.c kgdb
file arch/m68k/m68k/procfs_machdep.c procfs
+file arch/m68k/m68k/m68k_intr.c
+file arch/m68k/m68k/m68k_intr_stubs.s
file arch/m68k/m68k/vectors.c
file arch/m68k/m68k/vm_machdep.c
Index: src/sys/arch/sun68k/include/intr.h
diff -u src/sys/arch/sun68k/include/intr.h:1.23 src/sys/arch/sun68k/include/intr.h:1.24
--- src/sys/arch/sun68k/include/intr.h:1.23 Sun Jan 14 17:51:16 2024
+++ src/sys/arch/sun68k/include/intr.h Sun Jan 14 22:34:54 2024
@@ -1,10 +1,12 @@
-/* $NetBSD: intr.h,v 1.23 2024/01/14 17:51:16 thorpej Exp $ */
+/* $NetBSD: intr.h,v 1.24 2024/01/14 22:34:54 thorpej Exp $ */
-/*
- * Copyright (c) 2001 Matt Fredette.
- * Copyright (c) 1998 Matt Thomas.
+/*-
+ * Copyright (c) 2024 The NetBSD Foundation, Inc.
* All rights reserved.
*
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe.
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -13,41 +15,35 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. The name of the company nor the names of the authors may be used to
- * endorse or promote products derived from this software without specific
- * prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _SUN68K_INTR_H_
#define _SUN68K_INTR_H_
-#include <sys/queue.h>
#include <m68k/psl.h>
-/*
- * Interrupt levels.
- */
-#define IPL_NONE 0
-#define IPL_SOFTCLOCK 1
-#define IPL_SOFTBIO 2
-#define IPL_SOFTNET 3
-#define IPL_SOFTSERIAL 4
-#define IPL_VM 5
-#define IPL_SCHED 6
-#define IPL_HIGH 7
-#define NIPL 8
+#define MACHINE_PSL_IPL_SOFTCLOCK PSL_IPL1
+#define MACHINE_PSL_IPL_SOFTBIO PSL_IPL1
+#define MACHINE_PSL_IPL_SOFTNET PSL_IPL1
+#define MACHINE_PSL_IPL_SOFTSERIAL PSL_IPL3
+#define MACHINE_PSL_IPL_VM PSL_IPL4
+#define MACHINE_PSL_IPL_SCHED PSL_IPL7
+
+/* Zilog Serial hardware interrupts (hard-wired at 6) */
+#define splzs() splserial() /* aliased to splhigh() */
+#define IPL_ZS IPL_SERIAL
#define _IPL_SOFT_LEVEL1 1
#define _IPL_SOFT_LEVEL2 2
@@ -55,89 +51,33 @@
#define _IPL_SOFT_LEVEL_MIN 1
#define _IPL_SOFT_LEVEL_MAX 3
-#if defined(_KERNEL) || defined(_KMEMUSER)
-typedef struct {
- uint16_t _psl;
-} ipl_cookie_t;
-#endif
+#include <m68k/intr.h>
#ifdef _KERNEL
-extern int idepth;
-
-static inline bool
-cpu_intr_p(void)
-{
-
- return idepth != 0;
-}
-
-extern const uint16_t ipl2psl_table[NIPL];
+/*
+ * Aliases for the legacy sun68k ISR routines.
+ */
-typedef int ipl_t;
+typedef int (*isr_func_t)(void *);
-static inline ipl_cookie_t
-makeiplcookie(ipl_t ipl)
+static inline void
+isr_add_autovect(isr_func_t func, void *arg, int ipl)
{
-
- return (ipl_cookie_t){._psl = ipl2psl_table[ipl]};
+ /* XXX leaks interrupt handle. */
+ m68k_intr_establish(func, arg, (void *)0, 0, ipl, 0, 0);
}
-static inline int
-splraiseipl(ipl_cookie_t icookie)
+static inline void
+isr_add_vectored(isr_func_t func, void *arg, int ipl, int vec)
{
-
- return _splraise(icookie._psl);
+ /* XXX leaks interrupt handle. */
+ m68k_intr_establish(func, arg, (void *)0, vec, ipl, 0, 0);
}
-/* These connect interrupt handlers. */
-typedef int (*isr_func_t)(void *);
-void isr_add_autovect(isr_func_t, void *, int);
-void isr_add_vectored(isr_func_t, void *, int, int);
-
-/*
- * Define inline functions for PSL manipulation.
- * These are as close to macros as one can get.
- * When not optimizing gcc will call the locore.s
- * functions by the same names, so breakpoints on
- * these functions will work normally, etc.
- * (See the GCC extensions info document.)
- */
-
-/*
- * The rest of this is sun68k specific, because other ports may
- * need to do special things in spl0() (i.e. simulate SIR).
- * Suns have a REAL interrupt register, so spl0() and splx(s)
- * have no need to check for any simulated interrupts, etc.
- */
-
-#define spl0() _spl0() /* we have real software interrupts */
-#define splx(x) _spl(x)
-
-/* IPL used by soft interrupts: netintr(), softclock() */
-#define splsoftclock() splraise1()
-#define splsoftbio() splraise1()
-#define splsoftnet() splraise1()
-#define splsoftserial() splraise3()
-
-/*
- * Note that the VM code runs at spl7 during kernel
- * initialization, and later at spl0, so we have to
- * use splraise to avoid enabling interrupts early.
- */
-#define splvm() splraise4()
-
-/* Zilog Serial hardware interrupts (hard-wired at 6) */
-#define splzs() splserial()
-#define IPL_ZS IPL_SERIAL
-
-/* Block out all interrupts (except NMI of course). */
-#define splhigh() spl7()
-#define splsched() spl7()
-
/* This returns true iff the spl given is spl0. */
#define is_spl0(s) (((s) & PSL_IPL7) == 0)
-#endif /* _KERNEL */
+#endif /* _KERNEL */
#endif /* _SUN68K_INTR_H */
Index: src/sys/arch/sun68k/include/types.h
diff -u src/sys/arch/sun68k/include/types.h:1.1 src/sys/arch/sun68k/include/types.h:1.2
--- src/sys/arch/sun68k/include/types.h:1.1 Sun Jan 14 18:22:02 2024
+++ src/sys/arch/sun68k/include/types.h Sun Jan 14 22:34:54 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: types.h,v 1.1 2024/01/14 18:22:02 thorpej Exp $ */
+/* $NetBSD: types.h,v 1.2 2024/01/14 22:34:54 thorpej Exp $ */
#include <m68k/types.h>
@@ -8,3 +8,4 @@
#define __HAVE_MM_MD_MMAP
#define __HAVE_MM_MD_READWRITE
#define __HAVE_NO_PMAP_STATS
+#define __HAVE_M68K_INTR_VECTORED
Index: src/sys/arch/sun68k/include/vectors.h
diff -u src/sys/arch/sun68k/include/vectors.h:1.1 src/sys/arch/sun68k/include/vectors.h:1.2
--- src/sys/arch/sun68k/include/vectors.h:1.1 Sat Jan 13 18:51:38 2024
+++ src/sys/arch/sun68k/include/vectors.h Sun Jan 14 22:34:54 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: vectors.h,v 1.1 2024/01/13 18:51:38 thorpej Exp $ */
+/* $NetBSD: vectors.h,v 1.2 2024/01/14 22:34:54 thorpej Exp $ */
/*-
* Copyright (c) 1996, 2024 The NetBSD Foundation, Inc.
@@ -42,14 +42,14 @@
#define MACHINE_BUSERR_HANDLER buserr
#define MACHINE_ADDRERR_HANDLER addrerr
-#define MACHINE_AV0_HANDLER _isr_autovec
-#define MACHINE_AV1_HANDLER _isr_autovec
-#define MACHINE_AV2_HANDLER _isr_autovec
-#define MACHINE_AV3_HANDLER _isr_autovec
-#define MACHINE_AV4_HANDLER _isr_autovec
-#define MACHINE_AV5_HANDLER _isr_autovec
-#define MACHINE_AV6_HANDLER _isr_autovec
-#define MACHINE_AV7_HANDLER _isr_autovec
+#define MACHINE_AV0_HANDLER intrstub_autovec
+#define MACHINE_AV1_HANDLER intrstub_autovec
+#define MACHINE_AV2_HANDLER intrstub_autovec
+#define MACHINE_AV3_HANDLER intrstub_autovec
+#define MACHINE_AV4_HANDLER intrstub_autovec
+#define MACHINE_AV5_HANDLER intrstub_autovec
+#define MACHINE_AV6_HANDLER intrstub_autovec
+#define MACHINE_AV7_HANDLER intrstub_autovec
#endif /* _KERNEL */
