Module Name: src
Committed By: thorpej
Date: Mon Jan 15 03:07:14 UTC 2024
Modified Files:
src/sys/arch/cesfic/cesfic: isr.h locore.s
src/sys/arch/cesfic/conf: files.cesfic
src/sys/arch/cesfic/include: cpu.h intr.h vectors.h
Removed Files:
src/sys/arch/cesfic/cesfic: isr.c
Log Message:
Switch cesfic over to the common interrupt dispatch code.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r0 src/sys/arch/cesfic/cesfic/isr.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/cesfic/cesfic/isr.h
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/cesfic/cesfic/locore.s
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/cesfic/conf/files.cesfic
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/cesfic/include/cpu.h
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/cesfic/include/intr.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/cesfic/include/vectors.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/cesfic/cesfic/isr.h
diff -u src/sys/arch/cesfic/cesfic/isr.h:1.4 src/sys/arch/cesfic/cesfic/isr.h:1.5
--- src/sys/arch/cesfic/cesfic/isr.h:1.4 Sat Mar 14 14:45:58 2009
+++ src/sys/arch/cesfic/cesfic/isr.h Mon Jan 15 03:07:14 2024
@@ -1,7 +1,7 @@
-/* $NetBSD: isr.h,v 1.4 2009/03/14 14:45:58 dsl Exp $ */
+/* $NetBSD: isr.h,v 1.5 2024/01/15 03:07:14 thorpej Exp $ */
/*-
- * Copyright (c) 1996 The NetBSD Foundation, Inc.
+ * Copyright (c) 2024 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
@@ -29,41 +29,25 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-#include <sys/queue.h>
+#ifndef _LUNA68K_ISR_H_
+#define _LUNA68K_ISR_H_
-/*
- * The location and size of the autovectored interrupt portion
- * of the vector table.
- */
-#define ISRLOC 0x18
-#define NISR 8
-
-struct isr {
- LIST_ENTRY(isr) isr_link;
- int (*isr_func)(void *);
- void *isr_arg;
- int isr_ipl;
- int isr_priority;
-};
+#include <sys/intr.h>
/*
- * ISR priorities. These are not the same as interrupt levels.
- * These serve 2 purposes:
- * - properly order ISRs in the list
- * - compute levels for spl*() calls.
+ * Aliases for the legacy cesfic ISR routines.
*/
-#define ISRPRI_BIO 0
-#define ISRPRI_NET 1
-#define ISRPRI_TTY 2
-#define ISRPRI_TTYNOBUF 3
-/*
- * Convert PSL values to IPLs and vice-versa.
- */
-#define PSLTOIPL(x) (((x) >> 8) & 0xf)
-#define IPLTOPSL(x) ((((x) & 0xf) << 8) | PSL_S)
+static inline void
+isrinit(void)
+{
+ m68k_intr_init(NULL);
+}
+
+static inline void *
+isrlink(int (*func)(void *), void *arg, int ipl, int isrpri)
+{
+ return m68k_intr_establish(func, arg, NULL, 0, ipl, isrpri, 0);
+}
-void isrinit(void);
-void *isrlink(int (*)(void *), void *, int, int);
-void isrunlink(void *);
-void isrdispatch(int);
+#endif /* _LUNA68K_ISR_H_ */
Index: src/sys/arch/cesfic/cesfic/locore.s
diff -u src/sys/arch/cesfic/cesfic/locore.s:1.40 src/sys/arch/cesfic/cesfic/locore.s:1.41
--- src/sys/arch/cesfic/cesfic/locore.s:1.40 Mon Jan 15 02:40:52 2024
+++ src/sys/arch/cesfic/cesfic/locore.s Mon Jan 15 03:07:14 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.40 2024/01/15 02:40:52 thorpej Exp $ */
+/* $NetBSD: locore.s,v 1.41 2024/01/15 03:07:14 thorpej Exp $ */
/*
* Copyright (c) 1980, 1990, 1993
@@ -613,15 +613,6 @@ ENTRY_NOPROFILE(spurintr) /* level 0 */
INTERRUPT_RESTOREREG
jra _ASM_LABEL(rei)
-ENTRY_NOPROFILE(intrhand) /* levels 1 through 5 */
- INTERRUPT_SAVEREG
- movw %sp@(22),%sp@- | push exception vector info
- clrw %sp@-
- jbsr _C_LABEL(isrdispatch) | call dispatch routine
- addql #4,%sp
- INTERRUPT_RESTOREREG
- jra _ASM_LABEL(rei) | all done
-
ENTRY_NOPROFILE(lev6intr) /* Level 6: clock */
INTERRUPT_SAVEREG
/* XXX */
@@ -631,7 +622,7 @@ ENTRY_NOPROFILE(lev6intr) /* Level 6: cl
btst #2, %d0
jeq 1f
addql #1,_C_LABEL(intrcnt)+24
- lea %sp@(16), %a1 | a1 = &clockframe
+ lea %sp@(0), %a1 | a1 = &clockframe
movl %a1, %sp@-
jbsr _C_LABEL(hardclock) | hardclock(&frame)
addql #4, %sp
Index: src/sys/arch/cesfic/conf/files.cesfic
diff -u src/sys/arch/cesfic/conf/files.cesfic:1.20 src/sys/arch/cesfic/conf/files.cesfic:1.21
--- src/sys/arch/cesfic/conf/files.cesfic:1.20 Mon Jan 15 02:40:52 2024
+++ src/sys/arch/cesfic/conf/files.cesfic Mon Jan 15 03:07:14 2024
@@ -1,4 +1,4 @@
-# $NetBSD: files.cesfic,v 1.20 2024/01/15 02:40:52 thorpej Exp $
+# $NetBSD: files.cesfic,v 1.21 2024/01/15 03:07:14 thorpej Exp $
#
# cesfic-specific configuration info
@@ -52,12 +52,13 @@ file arch/cesfic/dev/if_le.c le
file arch/cesfic/cesfic/autoconf.c
file arch/cesfic/cesfic/clock.c
file arch/cesfic/cesfic/machdep.c
-file arch/cesfic/cesfic/isr.c
file arch/cesfic/cesfic/pmap_bootstrap.c
file arch/cesfic/cesfic/trap.c
file arch/m68k/m68k/cacheops.c
file arch/m68k/m68k/db_memrw.c ddb | kgdb
file arch/m68k/m68k/kgdb_machdep.c kgdb
+file arch/m68k/m68k/m68k_intr.c
+file arch/m68k/m68k/m68k_intr_stubs.s
file arch/m68k/m68k/m68k_trap.c
file arch/m68k/m68k/mmu_subr.s
file arch/m68k/m68k/pmap_motorola.c
Index: src/sys/arch/cesfic/include/cpu.h
diff -u src/sys/arch/cesfic/include/cpu.h:1.34 src/sys/arch/cesfic/include/cpu.h:1.35
--- src/sys/arch/cesfic/include/cpu.h:1.34 Tue Jan 9 04:16:24 2024
+++ src/sys/arch/cesfic/include/cpu.h Mon Jan 15 03:07:14 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.h,v 1.34 2024/01/09 04:16:24 thorpej Exp $ */
+/* $NetBSD: cpu.h,v 1.35 2024/01/15 03:07:14 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -56,19 +56,20 @@
/*
* Arguments to hardclock and gatherstats encapsulate the previous
* machine state in an opaque clockframe. On the cesfic, we use
- * what the hardware pushes on an interrupt (frame format 0).
+ * what the locore.s glue puts on the stack before calling C-code.
*/
struct clockframe {
- u_short sr; /* sr at time of interrupt */
- u_long pc; /* pc at time of interrupt */
- u_short vo; /* vector offset (4-word frame) */
+ u_int cf_regs[4]; /* d0,d1,a0,a1 */
+ u_short cf_sr; /* sr at time of interrupt */
+ u_long cf_pc; /* pc at time of interrupt */
+ u_short cf_vo; /* vector offset (4-word frame) */
} __attribute__((packed));
-#define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
-#define CLKF_PC(framep) ((framep)->pc)
+#define CLKF_USERMODE(framep) (((framep)->cf_sr & PSL_S) == 0)
+#define CLKF_PC(framep) ((framep)->cf_pc)
#if 0
/* We would like to do it this way... */
-#define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
+#define CLKF_INTR(framep) (((framep)->cf_sr & PSL_M) == 0)
#else
/* but until we start using PSL_M, we have to do this instead */
#define CLKF_INTR(framep) (0) /* XXX */
Index: src/sys/arch/cesfic/include/intr.h
diff -u src/sys/arch/cesfic/include/intr.h:1.15 src/sys/arch/cesfic/include/intr.h:1.16
--- src/sys/arch/cesfic/include/intr.h:1.15 Tue Jul 11 10:55:02 2023
+++ src/sys/arch/cesfic/include/intr.h Mon Jan 15 03:07:14 2024
@@ -1,13 +1,11 @@
-/* $NetBSD: intr.h,v 1.15 2023/07/11 10:55:02 riastradh Exp $ */
+/* $NetBSD: intr.h,v 1.16 2024/01/15 03:07:14 thorpej Exp $ */
-/*
- * Copyright (c) 1988 University of Utah.
- * Copyright (c) 1982, 1986, 1990, 1993
- * The Regents of the University of California. All rights reserved.
+/*-
+ * Copyright (c) 2024 The NetBSD Foundation, Inc.
+ * All rights reserved.
*
- * This code is derived from software contributed to Berkeley by
- * the Systems Programming Group of the University of Utah Computer
- * Science Department.
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -17,95 +15,32 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * from: Utah $Hdr: machparam.h 1.16 92/12/20$
- *
- * from: @(#)param.h 8.1 (Berkeley) 6/10/93
- */
-
-#ifndef _CESFIC_INTR_H_
-#define _CESFIC_INTR_H_
-
-/*
- * spl functions; all but spl0 are done in-line
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
-#include <machine/psl.h>
-#if (defined(_KERNEL) || defined(_KMEMUSER)) && !defined(_LOCORE)
+#ifndef _LUNA68K_INTR_H_
+#define _LUNA68K_INTR_H_
-typedef struct {
- uint16_t _psl;
-} ipl_cookie_t;
-
-#endif
-
-#if defined(_KERNEL) && !defined(_LOCORE)
-/* spl0 requires checking for software interrupts */
-#define spl1() _spl(PSL_S|PSL_IPL1)
-#define spl2() _spl(PSL_S|PSL_IPL2)
-#define spl3() _spl(PSL_S|PSL_IPL3)
-#define spl4() _spl(PSL_S|PSL_IPL4)
-#define spl5() _spl(PSL_S|PSL_IPL5)
-#define spl6() _spl(PSL_S|PSL_IPL6)
-#define spl7() _spl(PSL_S|PSL_IPL7)
-
-/* These spl calls are used by machine-independent code. */
-#define splsoftclock() splraise1()
-#define splsoftbio() splraise1()
-#define splsoftnet() splraise1()
-#define splsoftserial() splraise1()
-#define splvm() splraise4()
-#define splsched() spl6()
-#define splhigh() spl7()
-
-/* watch out for side effects */
-#define splx(s) (s & PSL_IPL ? _spl(s) : spl0())
-
-int spl0(void);
-
-#define IPL_NONE 0
-#define IPL_SOFTCLOCK 1
-#define IPL_SOFTBIO 1
-#define IPL_SOFTNET 3
-#define IPL_SOFTSERIAL 4
-#define IPL_VM 5
-#define IPL_SCHED 6
-#define IPL_HIGH 7
-#define NIPL 8
-
-extern const uint16_t ipl2psl_table[NIPL];
-
-typedef int ipl_t;
-
-static inline ipl_cookie_t
-makeiplcookie(ipl_t ipl)
-{
-
- return (ipl_cookie_t){._psl = ipl2psl_table[ipl]};
-}
-
-static inline int
-splraiseipl(ipl_cookie_t icookie)
-{
+#include <m68k/psl.h>
- return _splraise(icookie._psl);
-}
+#define MACHINE_PSL_IPL_SOFTCLOCK PSL_IPL1
+#define MACHINE_PSL_IPL_SOFTBIO PSL_IPL1
+#define MACHINE_PSL_IPL_SOFTNET PSL_IPL1
+#define MACHINE_PSL_IPL_SOFTSERIAL PSL_IPL1
+#define MACHINE_PSL_IPL_VM PSL_IPL4
+#define MACHINE_PSL_IPL_SCHED PSL_IPL6
-#endif /* _KERNEL && !_LOCORE */
+#include <m68k/intr.h>
-#endif /* !_CESFIC_INTR_H_ */
+#endif /* _LUNA68K_INTR_H */
Index: src/sys/arch/cesfic/include/vectors.h
diff -u src/sys/arch/cesfic/include/vectors.h:1.1 src/sys/arch/cesfic/include/vectors.h:1.2
--- src/sys/arch/cesfic/include/vectors.h:1.1 Mon Jan 15 02:40:52 2024
+++ src/sys/arch/cesfic/include/vectors.h Mon Jan 15 03:07:14 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: vectors.h,v 1.1 2024/01/15 02:40:52 thorpej Exp $ */
+/* $NetBSD: vectors.h,v 1.2 2024/01/15 03:07:14 thorpej Exp $ */
/*-
* Copyright (c) 2024 The NetBSD Foundation, Inc.
@@ -37,11 +37,11 @@
#include <m68k/vectors.h>
#define MACHINE_AV0_HANDLER spurintr
-#define MACHINE_AV1_HANDLER intrhand
-#define MACHINE_AV2_HANDLER intrhand
-#define MACHINE_AV3_HANDLER intrhand
-#define MACHINE_AV4_HANDLER intrhand
-#define MACHINE_AV5_HANDLER intrhand
+#define MACHINE_AV1_HANDLER intrstub_autovec
+#define MACHINE_AV2_HANDLER intrstub_autovec
+#define MACHINE_AV3_HANDLER intrstub_autovec
+#define MACHINE_AV4_HANDLER intrstub_autovec
+#define MACHINE_AV5_HANDLER intrstub_autovec
#define MACHINE_AV6_HANDLER lev6intr
#define MACHINE_AV7_HANDLER lev7intr
