Module Name:    src
Committed By:   skrll
Date:           Sat Apr 13 12:28:01 UTC 2024

Modified Files:
        src/sys/arch/arm/arm32: pmap.c

Log Message:
port-arm/58135: reproducible pmap KASSERT failure for armv7 with NFS root

Don't unconditionally set XN in pmap_clearbit - only set it if a mapping
exists VM_PROT_EXEC is being cleared.

I've simplified the #ifdefs in the patch from the PR.


To generate a diff of this commit:
cvs rdiff -u -r1.442 -r1.443 src/sys/arch/arm/arm32/pmap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/arm32/pmap.c
diff -u src/sys/arch/arm/arm32/pmap.c:1.442 src/sys/arch/arm/arm32/pmap.c:1.443
--- src/sys/arch/arm/arm32/pmap.c:1.442	Sat Apr 13 10:36:01 2024
+++ src/sys/arch/arm/arm32/pmap.c	Sat Apr 13 12:28:01 2024
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.442 2024/04/13 10:36:01 skrll Exp $	*/
+/*	$NetBSD: pmap.c,v 1.443 2024/04/13 12:28:01 skrll Exp $	*/
 
 /*
  * Copyright 2003 Wasabi Systems, Inc.
@@ -193,7 +193,7 @@
 #endif
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.442 2024/04/13 10:36:01 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.443 2024/04/13 12:28:01 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/types.h>
@@ -2330,15 +2330,10 @@ pmap_clearbit(struct vm_page_md *md, pad
 #ifdef PMAP_CACHE_VIPT
 	const bool want_syncicache = PV_IS_EXEC_P(md->pvh_attrs);
 	bool need_syncicache = false;
-#ifdef ARM_MMU_EXTENDED
-	const u_int execbits = (maskbits & PVF_EXEC) ? L2_XS_XN : 0;
-#else
-	const u_int execbits = 0;
+#ifndef ARM_MMU_EXTENDED
 	bool need_vac_me_harder = false;
 #endif
-#else
-	const u_int execbits = 0;
-#endif
+#endif /* PMAP_CACHE_VIPT */
 
 	UVMHIST_FUNC(__func__);
 	UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx maskbits %#jx",
@@ -2421,9 +2416,14 @@ pmap_clearbit(struct vm_page_md *md, pad
 
 		pt_entry_t * const ptep = &l2b->l2b_kva[l2pte_index(va)];
 		const pt_entry_t opte = *ptep;
-		pt_entry_t npte = opte | execbits;
+		pt_entry_t npte = opte;
+
+#if defined(ARM_MMU_EXTENDED)
+		if ((maskbits & PVF_EXEC) != 0 && l2pte_valid_p(opte)) {
+			KASSERT((opte & L2_TYPE_S) != 0);
+			npte |= L2_XS_XN;
+		}
 
-#ifdef ARM_MMU_EXTENDED
 		KASSERT((opte & L2_XS_nG) == (pm == pmap_kernel() ? 0 : L2_XS_nG));
 #endif
 

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