Module Name: src
Committed By: riastradh
Date: Sun May 12 21:53:26 UTC 2024
Modified Files:
src/tests/lib/libm: t_fenv.c
Log Message:
tests/lib/libm/t_fenv: Work around PR 58253.
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/tests/lib/libm/t_fenv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/tests/lib/libm/t_fenv.c
diff -u src/tests/lib/libm/t_fenv.c:1.16 src/tests/lib/libm/t_fenv.c:1.17
--- src/tests/lib/libm/t_fenv.c:1.16 Mon Mar 18 16:33:54 2024
+++ src/tests/lib/libm/t_fenv.c Sun May 12 21:53:26 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: t_fenv.c,v 1.16 2024/03/18 16:33:54 martin Exp $ */
+/* $NetBSD: t_fenv.c,v 1.17 2024/05/12 21:53:26 riastradh Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -29,7 +29,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__RCSID("$NetBSD: t_fenv.c,v 1.16 2024/03/18 16:33:54 martin Exp $");
+__RCSID("$NetBSD: t_fenv.c,v 1.17 2024/05/12 21:53:26 riastradh Exp $");
#include <atf-c.h>
@@ -341,6 +341,17 @@ ATF_TC_BODY(feenableexcept, tc)
(int)fpgetmask(), (int)FP_X_INV);
}
+/*
+ * Temporary workaround for PR 58253: powerpc has more fenv exception
+ * bits than it can handle.
+ */
+#if defined __powerpc__
+#define FE_TRAP_EXCEPT \
+ (FE_DIVBYZERO|FE_INEXACT|FE_INVALID|FE_OVERFLOW|FE_UNDERFLOW)
+#else
+#define FE_TRAP_EXCEPT FE_ALL_EXCEPT
+#endif
+
ATF_TC(fetestexcept_trap);
ATF_TC_HEAD(fetestexcept_trap, tc)
{
@@ -353,21 +364,21 @@ ATF_TC_BODY(fetestexcept_trap, tc)
FPU_EXC_PREREQ();
- fedisableexcept(FE_ALL_EXCEPT);
+ fedisableexcept(FE_TRAP_EXCEPT);
ATF_CHECK_EQ_MSG((except = fegetexcept()), 0,
"fegetexcept()=0x%x", except);
- (void)fetestexcept(FE_ALL_EXCEPT);
+ (void)fetestexcept(FE_TRAP_EXCEPT);
ATF_CHECK_EQ_MSG((except = fegetexcept()), 0,
"fegetexcept()=0x%x", except);
- feenableexcept(FE_ALL_EXCEPT);
- ATF_CHECK_EQ_MSG((except = fegetexcept()), FE_ALL_EXCEPT,
- "fegetexcept()=0x%x FE_ALL_EXCEPT=0x%x", except, FE_ALL_EXCEPT);
-
- (void)fetestexcept(FE_ALL_EXCEPT);
- ATF_CHECK_EQ_MSG((except = fegetexcept()), FE_ALL_EXCEPT,
- "fegetexcept()=0x%x FE_ALL_EXCEPT=0x%x", except, FE_ALL_EXCEPT);
+ feenableexcept(FE_TRAP_EXCEPT);
+ ATF_CHECK_EQ_MSG((except = fegetexcept()), FE_TRAP_EXCEPT,
+ "fegetexcept()=0x%x FE_TRAP_EXCEPT=0x%x", except, FE_TRAP_EXCEPT);
+
+ (void)fetestexcept(FE_TRAP_EXCEPT);
+ ATF_CHECK_EQ_MSG((except = fegetexcept()), FE_TRAP_EXCEPT,
+ "fegetexcept()=0x%x FE_ALL_EXCEPT=0x%x", except, FE_TRAP_EXCEPT);
}
ATF_TP_ADD_TCS(tp)
