Module Name: src
Committed By: riastradh
Date: Tue May 14 16:10:15 UTC 2024
Modified Files:
src/tests/lib/libc/gen: t_siginfo.c
Log Message:
t_siginfo: No SIGFPE on RISC-V.
To generate a diff of this commit:
cvs rdiff -u -r1.49 -r1.50 src/tests/lib/libc/gen/t_siginfo.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/tests/lib/libc/gen/t_siginfo.c
diff -u src/tests/lib/libc/gen/t_siginfo.c:1.49 src/tests/lib/libc/gen/t_siginfo.c:1.50
--- src/tests/lib/libc/gen/t_siginfo.c:1.49 Fri Aug 4 03:31:13 2023
+++ src/tests/lib/libc/gen/t_siginfo.c Tue May 14 16:10:14 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: t_siginfo.c,v 1.49 2023/08/04 03:31:13 rin Exp $ */
+/* $NetBSD: t_siginfo.c,v 1.50 2024/05/14 16:10:14 riastradh Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -318,6 +318,8 @@ ATF_TC_BODY(sigfpe_flt, tc)
*/
if (0 == fpsetmask(fpsetmask(FP_X_INV)))
atf_tc_skip("FPU does not implement traps on FP exceptions");
+#elif defined __riscv__
+ atf_tc_skip("RISC-V does not support floating-point exception traps");
#endif
if (sigsetjmp(sigfpe_flt_env, 0) == 0) {
sa.sa_flags = SA_SIGINFO;
@@ -366,7 +368,8 @@ ATF_TC_BODY(sigfpe_int, tc)
{
struct sigaction sa;
-#if defined(__aarch64__) || defined(__powerpc__) || defined(__sh3__)
+#if defined(__aarch64__) || defined(__powerpc__) || defined(__sh3__) || \
+ defined(__riscv__)
atf_tc_skip("Integer division by zero doesn't trap");
#endif
if (sigsetjmp(sigfpe_int_env, 0) == 0) {
