Module Name: src
Committed By: riastradh
Date: Fri May 17 02:11:07 UTC 2024
Modified Files:
src/lib/libm/arch/riscv: fenv.c
Log Message:
riscv: Make feraiseexcept actually raise the given exceptions.
Doing
fexcept_t ex = 0;
fesetexceptflag(&ex, excepts);
has the effect of _clearing_ all the exceptions in excepts. Using
fesetexceptflag doesn't make this easier, because we would have to
record which exceptions were already raised. So just set the fflags
bits in the fcsr register directly.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/lib/libm/arch/riscv/fenv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/lib/libm/arch/riscv/fenv.c
diff -u src/lib/libm/arch/riscv/fenv.c:1.4 src/lib/libm/arch/riscv/fenv.c:1.5
--- src/lib/libm/arch/riscv/fenv.c:1.4 Sun May 7 12:41:47 2023
+++ src/lib/libm/arch/riscv/fenv.c Fri May 17 02:11:07 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: fenv.c,v 1.4 2023/05/07 12:41:47 skrll Exp $ */
+/* $NetBSD: fenv.c,v 1.5 2024/05/17 02:11:07 riastradh Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__RCSID("$NetBSD: fenv.c,v 1.4 2023/05/07 12:41:47 skrll Exp $");
+__RCSID("$NetBSD: fenv.c,v 1.5 2024/05/17 02:11:07 riastradh Exp $");
#include "namespace.h"
@@ -114,19 +114,15 @@ fegetexceptflag(fexcept_t *flagp, int ex
* The standard explicitly allows us to execute an instruction that has the
* exception as a side effect, but we choose to manipulate the status register
* directly.
- *
- * The validation of input is being deferred to fesetexceptflag().
*/
int
feraiseexcept(int excepts)
{
- fexcept_t ex = 0;
_DIAGASSERT((excepts & ~FE_ALL_EXCEPT) == 0);
excepts &= FE_ALL_EXCEPT;
- fesetexceptflag(&ex, excepts);
- /* XXX exception magic XXX */
+ fcsr_fflags_write(fcsr_fflags_read() | excepts);
/* Success */
return 0;
