Module Name: src
Committed By: andvar
Date: Thu May 23 08:30:51 UTC 2024
Modified Files:
src/sys/arch/hpcmips/dev: mq200reg.h plumvideoreg.h
Log Message:
fix typos in comments.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/hpcmips/dev/mq200reg.h
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/hpcmips/dev/plumvideoreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/hpcmips/dev/mq200reg.h
diff -u src/sys/arch/hpcmips/dev/mq200reg.h:1.11 src/sys/arch/hpcmips/dev/mq200reg.h:1.12
--- src/sys/arch/hpcmips/dev/mq200reg.h:1.11 Sun Feb 28 15:52:16 2010
+++ src/sys/arch/hpcmips/dev/mq200reg.h Thu May 23 08:30:51 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: mq200reg.h,v 1.11 2010/02/28 15:52:16 snj Exp $ */
+/* $NetBSD: mq200reg.h,v 1.12 2024/05/23 08:30:51 andvar Exp $ */
/*-
* Copyright (c) 2000, 2001 TAKEMURA Shin
@@ -195,7 +195,7 @@
# define MQ200_GC2CRCC_RESULT_SHIFT 8
# define MQ200_GC2CRCC_RESULT_MASK 0x3fffff00
-/* GC Hotizontal Display Control (GC02R and GC22R) */
+/* GC Horizontal Display Control (GC02R and GC22R) */
#define MQ200_GCHDCR(n) (MQ200_GC(n)+0x08)
# define MQ200_GC1HDC_TOTAL_MASK 0x00000fff
# define MQ200_GC1HDC_TOTAL_SHIFT 0
@@ -213,7 +213,7 @@
# define MQ200_GCVDC_END_SHIFT 16
/* bits 31-28 are reserved */
-/* GC Hotizontal Sync Control (GC04R and GC24R) */
+/* GC Horizontal Sync Control (GC04R and GC24R) */
#define MQ200_GCHSCR(n) (MQ200_GC(n)+0x10)
# define MQ200_GCHSC_START_MASK 0x00000fff
# define MQ200_GCHSC_START_SHIFT 0
Index: src/sys/arch/hpcmips/dev/plumvideoreg.h
diff -u src/sys/arch/hpcmips/dev/plumvideoreg.h:1.6 src/sys/arch/hpcmips/dev/plumvideoreg.h:1.7
--- src/sys/arch/hpcmips/dev/plumvideoreg.h:1.6 Mon Apr 28 20:23:21 2008
+++ src/sys/arch/hpcmips/dev/plumvideoreg.h Thu May 23 08:30:51 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: plumvideoreg.h,v 1.6 2008/04/28 20:23:21 martin Exp $ */
+/* $NetBSD: plumvideoreg.h,v 1.7 2024/05/23 08:30:51 andvar Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@@ -99,7 +99,7 @@
/*
* LCD Timing Register
*/
-/* Horizontanl Total */
+/* Horizontal Total */
#define PLUM_VIDEO_PLHT_REG 0x080
/* Horizontal Display Start */
#define PLUM_VIDEO_PLHDS_REG 0x084
@@ -115,7 +115,7 @@
#define PLUM_VIDEO_PLVDS_REG 0x098
/* V-Sync Start/End */
#define PLUM_VIDEO_PLVSEVSS_REG 0x09c
-/* V-Blankng Start/End */
+/* V-Blanking Start/End */
#define PLUM_VIDEO_PLVBEVBS_REG 0x0a0
/* Current Line # */
#define PLUM_VIDEO_PLCLN_REG 0x0a8
