Module Name: src
Committed By: jakllsch
Date: Mon Oct 7 23:11:33 UTC 2024
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c
src/sys/arch/arm/include: cputypes.h
src/usr.sbin/cpuctl/arch: aarch64.c
Log Message:
CPU ID strings for Arm Cortex-A710, Neoverse V1, Neoverse N2, and Fujitsu A64FX
To generate a diff of this commit:
cvs rdiff -u -r1.80 -r1.81 src/sys/arch/aarch64/aarch64/cpu.c
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/include/cputypes.h
cvs rdiff -u -r1.24 -r1.25 src/usr.sbin/cpuctl/arch/aarch64.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.80 src/sys/arch/aarch64/aarch64/cpu.c:1.81
--- src/sys/arch/aarch64/aarch64/cpu.c:1.80 Fri Sep 27 15:12:45 2024
+++ src/sys/arch/aarch64/aarch64/cpu.c Mon Oct 7 23:11:33 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.80 2024/09/27 15:12:45 jakllsch Exp $ */
+/* $NetBSD: cpu.c,v 1.81 2024/10/07 23:11:33 jakllsch Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.80 2024/09/27 15:12:45 jakllsch Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.81 2024/10/07 23:11:33 jakllsch Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
@@ -229,10 +229,13 @@ const struct cpuidtab cpuids[] = {
{ CPU_ID_CORTEXA76R3 & CPU_PARTMASK, "Cortex-A76", "Arm", "v8.2-A+" },
{ CPU_ID_CORTEXA76AER1 & CPU_PARTMASK, "Cortex-A76AE", "Arm", "v8.2-A+" },
{ CPU_ID_CORTEXA77R0 & CPU_PARTMASK, "Cortex-A77", "Arm", "v8.2-A+" },
+ { CPU_ID_CORTEXA710R2 & CPU_PARTMASK, "Cortex-A710", "Arm", "v9.0-A" },
{ CPU_ID_NVIDIADENVER2 & CPU_PARTMASK, "Denver2", "NVIDIA", "v8-A" },
{ CPU_ID_EMAG8180 & CPU_PARTMASK, "eMAG", "Ampere", "v8-A" },
{ CPU_ID_NEOVERSEE1R1 & CPU_PARTMASK, "Neoverse E1", "Arm", "v8.2-A+" },
{ CPU_ID_NEOVERSEN1R3 & CPU_PARTMASK, "Neoverse N1", "Arm", "v8.2-A+" },
+ { CPU_ID_NEOVERSEV1R1 & CPU_PARTMASK, "Neoverse V1", "Arm", "v8.4-A+" },
+ { CPU_ID_NEOVERSEN2R0 & CPU_PARTMASK, "Neoverse N2", "Arm", "v9.0-A" },
{ CPU_ID_THUNDERXRX, "ThunderX", "Cavium", "v8-A" },
{ CPU_ID_THUNDERX81XXRX, "ThunderX CN81XX", "Cavium", "v8-A" },
{ CPU_ID_THUNDERX83XXRX, "ThunderX CN83XX", "Cavium", "v8-A" },
@@ -241,6 +244,7 @@ const struct cpuidtab cpuids[] = {
{ CPU_ID_APPLE_M1_FIRESTORM & CPU_PARTMASK, "M1 Firestorm", "Apple", "Apple Silicon" },
{ CPU_ID_AMPERE1 & CPU_PARTMASK, "Ampere-1", "Ampere", "v8.6-A+" },
{ CPU_ID_AMPERE1A & CPU_PARTMASK, "Ampere-1A", "Ampere", "v8.6-A+" },
+ { CPU_ID_A64FX & CPU_PARTMASK, "A64FX", "Fujitsu", "v8.2-A+" },
};
static void
Index: src/sys/arch/arm/include/cputypes.h
diff -u src/sys/arch/arm/include/cputypes.h:1.17 src/sys/arch/arm/include/cputypes.h:1.18
--- src/sys/arch/arm/include/cputypes.h:1.17 Fri Sep 27 15:07:16 2024
+++ src/sys/arch/arm/include/cputypes.h Mon Oct 7 23:11:33 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: cputypes.h,v 1.17 2024/09/27 15:07:16 jakllsch Exp $ */
+/* $NetBSD: cputypes.h,v 1.18 2024/10/07 23:11:33 jakllsch Exp $ */
/*
* Copyright (c) 1998, 2001 Ben Harris
@@ -50,6 +50,7 @@
#define CPU_ID_BROADCOM 0x42000000 /* 'B' */
#define CPU_ID_CAVIUM 0x43000000 /* 'C' */
#define CPU_ID_DEC 0x44000000 /* 'D' */
+#define CPU_ID_FUJITSU 0x46000000 /* 'F' */
#define CPU_ID_INFINEON 0x49000000 /* 'I' */
#define CPU_ID_MOTOROLA 0x4d000000 /* 'M' */
#define CPU_ID_NVIDIA 0x4e000000 /* 'N' */
@@ -177,6 +178,9 @@
#define CPU_ID_NEOVERSEN1R3 0x413fd0c0
#define CPU_ID_NEOVERSEE1R1 0x411fd4a0
#define CPU_ID_CORTEXA77R0 0x410fd0d0
+#define CPU_ID_NEOVERSEV1R1 0x411fd400
+#define CPU_ID_CORTEXA710R2 0x412fd470
+#define CPU_ID_NEOVERSEN2R0 0x410fd490
#define CPU_ID_CORTEX_P(n) ((n & 0xff0fe000) == 0x410fc000)
#define CPU_ID_CORTEX_A5_P(n) ((n & 0xff0ff0f0) == 0x410fc050)
@@ -209,6 +213,8 @@
#define CPU_ID_THUNDERX83XXRX 0x43000a30
#define CPU_ID_THUNDERX2RX 0x43000af0
+#define CPU_ID_A64FX 0x460f0010
+
#define CPU_ID_AMPERE1 0xc00fac30
#define CPU_ID_AMPERE1A 0xc00fac40
Index: src/usr.sbin/cpuctl/arch/aarch64.c
diff -u src/usr.sbin/cpuctl/arch/aarch64.c:1.24 src/usr.sbin/cpuctl/arch/aarch64.c:1.25
--- src/usr.sbin/cpuctl/arch/aarch64.c:1.24 Fri Sep 27 15:13:41 2024
+++ src/usr.sbin/cpuctl/arch/aarch64.c Mon Oct 7 23:11:33 2024
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64.c,v 1.24 2024/09/27 15:13:41 jakllsch Exp $ */
+/* $NetBSD: aarch64.c,v 1.25 2024/10/07 23:11:33 jakllsch Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
#ifndef lint
-__RCSID("$NetBSD: aarch64.c,v 1.24 2024/09/27 15:13:41 jakllsch Exp $");
+__RCSID("$NetBSD: aarch64.c,v 1.25 2024/10/07 23:11:33 jakllsch Exp $");
#endif /* no lint */
#include <sys/types.h>
@@ -83,10 +83,13 @@ const struct cpuidtab cpuids[] = {
{ CPU_ID_CORTEXA76R3 & CPU_PARTMASK, "Cortex-A76", "Arm", "v8.2-A+" },
{ CPU_ID_CORTEXA76AER1 & CPU_PARTMASK, "Cortex-A76AE", "Arm", "v8.2-A+" },
{ CPU_ID_CORTEXA77R0 & CPU_PARTMASK, "Cortex-A77", "Arm", "v8.2-A+" },
+ { CPU_ID_CORTEXA710R2 & CPU_PARTMASK, "Cortex-A710", "Arm", "v9.0-A" },
{ CPU_ID_NVIDIADENVER2 & CPU_PARTMASK, "Denver2", "NVIDIA", "v8-A" },
{ CPU_ID_EMAG8180 & CPU_PARTMASK, "eMAG", "Ampere", "v8-A" },
{ CPU_ID_NEOVERSEE1R1 & CPU_PARTMASK, "Neoverse E1", "Arm", "v8.2-A+" },
{ CPU_ID_NEOVERSEN1R3 & CPU_PARTMASK, "Neoverse N1", "Arm", "v8.2-A+" },
+ { CPU_ID_NEOVERSEV1R1 & CPU_PARTMASK, "Neoverse V1", "Arm", "v8.4-A+" },
+ { CPU_ID_NEOVERSEN2R0 & CPU_PARTMASK, "Neoverse N2", "Arm", "v9.0-A" },
{ CPU_ID_THUNDERXRX, "ThunderX", "Cavium", "v8-A" },
{ CPU_ID_THUNDERX81XXRX, "ThunderX CN81XX", "Cavium", "v8-A" },
{ CPU_ID_THUNDERX83XXRX, "ThunderX CN83XX", "Cavium", "v8-A" },
@@ -95,6 +98,7 @@ const struct cpuidtab cpuids[] = {
{ CPU_ID_APPLE_M1_FIRESTORM & CPU_PARTMASK, "M1 Firestorm", "Apple", "Apple Silicon" },
{ CPU_ID_AMPERE1 & CPU_PARTMASK, "Ampere-1", "Ampere", "v8.6-A+" },
{ CPU_ID_AMPERE1A & CPU_PARTMASK, "Ampere-1A", "Ampere", "v8.6-A+" },
+ { CPU_ID_A64FX & CPU_PARTMASK, "A64FX", "Fujitsu", "v8.2-A+" },
};
const struct impltab implids[] = {
@@ -102,6 +106,7 @@ const struct impltab implids[] = {
{ CPU_ID_BROADCOM, "Broadcom Corporation" },
{ CPU_ID_CAVIUM, "Cavium Inc." },
{ CPU_ID_DEC, "Digital Equipment Corporation" },
+ { CPU_ID_FUJITSU, "Fujitsu Ltd." },
{ CPU_ID_INFINEON, "Infineon Technologies AG" },
{ CPU_ID_MOTOROLA, "Motorola or Freescale Semiconductor Inc." },
{ CPU_ID_NVIDIA, "NVIDIA Corporation" },
