Module Name: xsrc
Committed By: mrg
Date: Sun Mar 9 08:51:34 UTC 2025
Modified Files:
xsrc/external/mit/libdrm/dist: xf86drm.c
Removed Files:
xsrc/external/mit/libdrm/dist: Android.common.mk Android.mk
Makefile.sources
xsrc/external/mit/libdrm/dist/amdgpu: Android.mk Makefile.sources
xsrc/external/mit/libdrm/dist/data: Android.mk
xsrc/external/mit/libdrm/dist/etnaviv: Android.mk Makefile.sources
xsrc/external/mit/libdrm/dist/freedreno: Android.mk Makefile.sources
xsrc/external/mit/libdrm/dist/intel: Android.mk Makefile.sources
xsrc/external/mit/libdrm/dist/nouveau: Android.mk Makefile.sources
xsrc/external/mit/libdrm/dist/omap: Android.mk
xsrc/external/mit/libdrm/dist/radeon: Android.mk Makefile.sources
xsrc/external/mit/libdrm/dist/tests: Android.mk
xsrc/external/mit/libdrm/dist/tests/modetest: Android.mk
Makefile.sources
xsrc/external/mit/libdrm/dist/tests/proptest: Android.mk
Makefile.sources
xsrc/external/mit/libdrm/dist/tests/util: Android.mk Makefile.sources
xsrc/external/mit/libdrm/dist/vc4: Makefile.sources
Log Message:
merge libdrm 2.4.124.
To generate a diff of this commit:
cvs rdiff -u -r1.1.1.1 -r0 xsrc/external/mit/libdrm/dist/Android.common.mk
cvs rdiff -u -r1.3 -r0 xsrc/external/mit/libdrm/dist/Android.mk
cvs rdiff -u -r1.1.1.7 -r0 xsrc/external/mit/libdrm/dist/Makefile.sources
cvs rdiff -u -r1.33 -r1.34 xsrc/external/mit/libdrm/dist/xf86drm.c
cvs rdiff -u -r1.1.1.1 -r0 xsrc/external/mit/libdrm/dist/amdgpu/Android.mk
cvs rdiff -u -r1.1.1.5 -r0 \
xsrc/external/mit/libdrm/dist/amdgpu/Makefile.sources
cvs rdiff -u -r1.1.1.1 -r0 xsrc/external/mit/libdrm/dist/data/Android.mk
cvs rdiff -u -r1.1.1.1 -r0 xsrc/external/mit/libdrm/dist/etnaviv/Android.mk
cvs rdiff -u -r1.1.1.2 -r0 \
xsrc/external/mit/libdrm/dist/etnaviv/Makefile.sources
cvs rdiff -u -r1.3 -r0 xsrc/external/mit/libdrm/dist/freedreno/Android.mk
cvs rdiff -u -r1.1.1.4 -r0 \
xsrc/external/mit/libdrm/dist/freedreno/Makefile.sources
cvs rdiff -u -r1.3 -r0 xsrc/external/mit/libdrm/dist/intel/Android.mk
cvs rdiff -u -r1.1.1.4 -r0 \
xsrc/external/mit/libdrm/dist/intel/Makefile.sources
cvs rdiff -u -r1.3 -r0 xsrc/external/mit/libdrm/dist/nouveau/Android.mk
cvs rdiff -u -r1.1.1.1 -r0 \
xsrc/external/mit/libdrm/dist/nouveau/Makefile.sources
cvs rdiff -u -r1.1.1.1 -r0 xsrc/external/mit/libdrm/dist/omap/Android.mk
cvs rdiff -u -r1.3 -r0 xsrc/external/mit/libdrm/dist/radeon/Android.mk
cvs rdiff -u -r1.1.1.2 -r0 \
xsrc/external/mit/libdrm/dist/radeon/Makefile.sources
cvs rdiff -u -r1.1.1.1 -r0 xsrc/external/mit/libdrm/dist/tests/Android.mk
cvs rdiff -u -r1.3 -r0 \
xsrc/external/mit/libdrm/dist/tests/modetest/Android.mk
cvs rdiff -u -r1.1.1.1 -r0 \
xsrc/external/mit/libdrm/dist/tests/modetest/Makefile.sources
cvs rdiff -u -r1.1.1.1 -r0 \
xsrc/external/mit/libdrm/dist/tests/proptest/Android.mk \
xsrc/external/mit/libdrm/dist/tests/proptest/Makefile.sources
cvs rdiff -u -r1.1.1.1 -r0 \
xsrc/external/mit/libdrm/dist/tests/util/Android.mk \
xsrc/external/mit/libdrm/dist/tests/util/Makefile.sources
cvs rdiff -u -r1.1.1.1 -r0 xsrc/external/mit/libdrm/dist/vc4/Makefile.sources
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: xsrc/external/mit/libdrm/dist/xf86drm.c
diff -u xsrc/external/mit/libdrm/dist/xf86drm.c:1.33 xsrc/external/mit/libdrm/dist/xf86drm.c:1.34
--- xsrc/external/mit/libdrm/dist/xf86drm.c:1.33 Thu Jul 4 09:22:57 2024
+++ xsrc/external/mit/libdrm/dist/xf86drm.c Sun Mar 9 08:51:31 2025
@@ -205,18 +205,6 @@ static const struct drmFormatVendorModif
{ AFBC_FORMAT_MOD_USM, "USM" },
};
-static bool is_x_t_amd_gfx9_tile(uint64_t tile)
-{
- switch (tile) {
- case AMD_FMT_MOD_TILE_GFX9_64K_S_X:
- case AMD_FMT_MOD_TILE_GFX9_64K_D_X:
- case AMD_FMT_MOD_TILE_GFX9_64K_R_X:
- return true;
- }
-
- return false;
-}
-
static bool
drmGetAfbcFormatModifierNameFromArm(uint64_t modifier, FILE *fp)
{
@@ -372,158 +360,159 @@ drmGetFormatModifierNameFromNvidia(uint6
return NULL;
}
-static void
-drmGetFormatModifierNameFromAmdDcc(uint64_t modifier, FILE *fp)
-{
- uint64_t dcc_max_compressed_block =
- AMD_FMT_MOD_GET(DCC_MAX_COMPRESSED_BLOCK, modifier);
- uint64_t dcc_retile = AMD_FMT_MOD_GET(DCC_RETILE, modifier);
-
- const char *dcc_max_compressed_block_str = NULL;
-
- fprintf(fp, ",DCC");
-
- if (dcc_retile)
- fprintf(fp, ",DCC_RETILE");
-
- if (!dcc_retile && AMD_FMT_MOD_GET(DCC_PIPE_ALIGN, modifier))
- fprintf(fp, ",DCC_PIPE_ALIGN");
-
- if (AMD_FMT_MOD_GET(DCC_INDEPENDENT_64B, modifier))
- fprintf(fp, ",DCC_INDEPENDENT_64B");
-
- if (AMD_FMT_MOD_GET(DCC_INDEPENDENT_128B, modifier))
- fprintf(fp, ",DCC_INDEPENDENT_128B");
-
- switch (dcc_max_compressed_block) {
- case AMD_FMT_MOD_DCC_BLOCK_64B:
- dcc_max_compressed_block_str = "64B";
- break;
- case AMD_FMT_MOD_DCC_BLOCK_128B:
- dcc_max_compressed_block_str = "128B";
- break;
- case AMD_FMT_MOD_DCC_BLOCK_256B:
- dcc_max_compressed_block_str = "256B";
- break;
- }
-
- if (dcc_max_compressed_block_str)
- fprintf(fp, ",DCC_MAX_COMPRESSED_BLOCK=%s",
- dcc_max_compressed_block_str);
-
- if (AMD_FMT_MOD_GET(DCC_CONSTANT_ENCODE, modifier))
- fprintf(fp, ",DCC_CONSTANT_ENCODE");
-}
-
-static void
-drmGetFormatModifierNameFromAmdTile(uint64_t modifier, FILE *fp)
-{
- uint64_t pipe_xor_bits, bank_xor_bits, packers, rb;
- uint64_t pipe, pipe_align, dcc, dcc_retile, tile_version;
-
- pipe_align = AMD_FMT_MOD_GET(DCC_PIPE_ALIGN, modifier);
- pipe_xor_bits = AMD_FMT_MOD_GET(PIPE_XOR_BITS, modifier);
- dcc = AMD_FMT_MOD_GET(DCC, modifier);
- dcc_retile = AMD_FMT_MOD_GET(DCC_RETILE, modifier);
- tile_version = AMD_FMT_MOD_GET(TILE_VERSION, modifier);
-
- fprintf(fp, ",PIPE_XOR_BITS=%"PRIu64, pipe_xor_bits);
-
- if (tile_version == AMD_FMT_MOD_TILE_VER_GFX9) {
- bank_xor_bits = AMD_FMT_MOD_GET(BANK_XOR_BITS, modifier);
- fprintf(fp, ",BANK_XOR_BITS=%"PRIu64, bank_xor_bits);
- }
-
- if (tile_version == AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) {
- packers = AMD_FMT_MOD_GET(PACKERS, modifier);
- fprintf(fp, ",PACKERS=%"PRIu64, packers);
- }
-
- if (dcc && tile_version == AMD_FMT_MOD_TILE_VER_GFX9) {
- rb = AMD_FMT_MOD_GET(RB, modifier);
- fprintf(fp, ",RB=%"PRIu64, rb);
- }
-
- if (dcc && tile_version == AMD_FMT_MOD_TILE_VER_GFX9 &&
- (dcc_retile || pipe_align)) {
- pipe = AMD_FMT_MOD_GET(PIPE, modifier);
- fprintf(fp, ",PIPE_%"PRIu64, pipe);
- }
-}
-
static char *
drmGetFormatModifierNameFromAmd(uint64_t modifier)
{
- uint64_t tile, tile_version, dcc;
+ static const char *gfx9_gfx11_tile_strings[32] = {
+ "LINEAR",
+ "256B_S",
+ "256B_D",
+ "256B_R",
+ "4KB_Z",
+ "4KB_S",
+ "4KB_D",
+ "4KB_R",
+ "64KB_Z",
+ "64KB_S",
+ "64KB_D",
+ "64KB_R",
+ "INVALID12",
+ "INVALID13",
+ "INVALID14",
+ "INVALID15",
+ "64KB_Z_T",
+ "64KB_S_T",
+ "64KB_D_T",
+ "64KB_R_T",
+ "4KB_Z_X",
+ "4KB_S_X",
+ "4KB_D_X",
+ "4KB_R_X",
+ "64KB_Z_X",
+ "64KB_S_X",
+ "64KB_D_X",
+ "64KB_R_X",
+ "256KB_Z_X",
+ "256KB_S_X",
+ "256KB_D_X",
+ "256KB_R_X",
+ };
+ static const char *gfx12_tile_strings[32] = {
+ "LINEAR",
+ "256B_2D",
+ "4KB_2D",
+ "64KB_2D",
+ "256KB_2D",
+ "4KB_3D",
+ "64KB_3D",
+ "256KB_3D",
+ /* other values are unused */
+ };
+ uint64_t tile_version = AMD_FMT_MOD_GET(TILE_VERSION, modifier);
FILE *fp;
char *mod_amd = NULL;
size_t size = 0;
- const char *str_tile = NULL;
- const char *str_tile_version = NULL;
-
- tile = AMD_FMT_MOD_GET(TILE, modifier);
- tile_version = AMD_FMT_MOD_GET(TILE_VERSION, modifier);
- dcc = AMD_FMT_MOD_GET(DCC, modifier);
-
fp = open_memstream(&mod_amd, &size);
if (!fp)
return NULL;
- /* add tile */
switch (tile_version) {
case AMD_FMT_MOD_TILE_VER_GFX9:
- str_tile_version = "GFX9";
+ fprintf(fp, "GFX9");
break;
case AMD_FMT_MOD_TILE_VER_GFX10:
- str_tile_version = "GFX10";
+ fprintf(fp, "GFX10");
break;
case AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS:
- str_tile_version = "GFX10_RBPLUS";
+ fprintf(fp, "GFX10_RBPLUS");
break;
case AMD_FMT_MOD_TILE_VER_GFX11:
- str_tile_version = "GFX11";
+ fprintf(fp, "GFX11");
break;
- }
-
- if (str_tile_version) {
- fprintf(fp, "%s", str_tile_version);
- } else {
+ case AMD_FMT_MOD_TILE_VER_GFX12:
+ fprintf(fp, "GFX12");
+ break;
+ default:
fclose(fp);
free(mod_amd);
return NULL;
}
- /* add tile str */
- switch (tile) {
- case AMD_FMT_MOD_TILE_GFX9_64K_S:
- str_tile = "GFX9_64K_S";
- break;
- case AMD_FMT_MOD_TILE_GFX9_64K_D:
- str_tile = "GFX9_64K_D";
- break;
- case AMD_FMT_MOD_TILE_GFX9_64K_S_X:
- str_tile = "GFX9_64K_S_X";
- break;
- case AMD_FMT_MOD_TILE_GFX9_64K_D_X:
- str_tile = "GFX9_64K_D_X";
- break;
- case AMD_FMT_MOD_TILE_GFX9_64K_R_X:
- str_tile = "GFX9_64K_R_X";
- break;
- case AMD_FMT_MOD_TILE_GFX11_256K_R_X:
- str_tile = "GFX11_256K_R_X";
- break;
- }
+ if (tile_version >= AMD_FMT_MOD_TILE_VER_GFX12) {
+ unsigned tile = AMD_FMT_MOD_GET(TILE, modifier);
+
+ fprintf(fp, ",%s", gfx12_tile_strings[tile]);
+
+ if (AMD_FMT_MOD_GET(DCC, modifier)) {
+ fprintf(fp, ",DCC,DCC_MAX_COMPRESSED_BLOCK=%uB",
+ 64 << AMD_FMT_MOD_GET(DCC_MAX_COMPRESSED_BLOCK, modifier));
- if (str_tile)
- fprintf(fp, ",%s", str_tile);
+ /* Other DCC fields are unused by GFX12. */
+ }
+ } else {
+ unsigned tile = AMD_FMT_MOD_GET(TILE, modifier);
- if (dcc)
- drmGetFormatModifierNameFromAmdDcc(modifier, fp);
+ fprintf(fp, ",%s", gfx9_gfx11_tile_strings[tile]);
- if (tile_version >= AMD_FMT_MOD_TILE_VER_GFX9 && is_x_t_amd_gfx9_tile(tile))
- drmGetFormatModifierNameFromAmdTile(modifier, fp);
+ /* All *_T and *_X modes are affected by chip-specific fields. */
+ if (tile >= 16) {
+ fprintf(fp, ",PIPE_XOR_BITS=%u",
+ (unsigned)AMD_FMT_MOD_GET(PIPE_XOR_BITS, modifier));
+
+ switch (tile_version) {
+ case AMD_FMT_MOD_TILE_VER_GFX9:
+ fprintf(fp, ",BANK_XOR_BITS=%u",
+ (unsigned)AMD_FMT_MOD_GET(BANK_XOR_BITS, modifier));
+ break;
+
+ case AMD_FMT_MOD_TILE_VER_GFX10:
+ /* Nothing else for GFX10. */
+ break;
+
+ case AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS:
+ case AMD_FMT_MOD_TILE_VER_GFX11:
+ /* This also determines the DCC layout, but DCC is only legal
+ * with tile=27 and tile=31 (*_R_X modes).
+ */
+ fprintf(fp, ",PACKERS=%u",
+ (unsigned)AMD_FMT_MOD_GET(PACKERS, modifier));
+ break;
+ }
+ }
+
+ if (AMD_FMT_MOD_GET(DCC, modifier)) {
+ if (tile_version == AMD_FMT_MOD_TILE_VER_GFX9 &&
+ (AMD_FMT_MOD_GET(DCC_PIPE_ALIGN, modifier) ||
+ AMD_FMT_MOD_GET(DCC_RETILE, modifier))) {
+ /* These two only determine the layout of
+ * the non-displayable DCC plane.
+ */
+ fprintf(fp, ",RB=%u",
+ (unsigned)AMD_FMT_MOD_GET(RB, modifier));
+ fprintf(fp, ",PIPE=%u",
+ (unsigned)AMD_FMT_MOD_GET(PIPE, modifier));
+ }
+
+ fprintf(fp, ",DCC,DCC_MAX_COMPRESSED_BLOCK=%uB",
+ 64 << AMD_FMT_MOD_GET(DCC_MAX_COMPRESSED_BLOCK, modifier));
+
+ if (AMD_FMT_MOD_GET(DCC_INDEPENDENT_64B, modifier))
+ fprintf(fp, ",DCC_INDEPENDENT_64B");
+
+ if (AMD_FMT_MOD_GET(DCC_INDEPENDENT_128B, modifier))
+ fprintf(fp, ",DCC_INDEPENDENT_128B");
+
+ if (AMD_FMT_MOD_GET(DCC_CONSTANT_ENCODE, modifier))
+ fprintf(fp, ",DCC_CONSTANT_ENCODE");
+
+ if (AMD_FMT_MOD_GET(DCC_PIPE_ALIGN, modifier))
+ fprintf(fp, ",DCC_PIPE_ALIGN");
+
+ if (AMD_FMT_MOD_GET(DCC_RETILE, modifier))
+ fprintf(fp, ",DCC_RETILE");
+ }
+ }
fclose(fp);
return mod_amd;
