Module Name: src
Committed By: msaitoh
Date: Thu Apr 23 10:47:44 UTC 2009
Modified Files:
src/sys/dev/mii: brgphy.c
src/sys/dev/pci: if_bge.c if_bgereg.h
Added Files:
src/sys/dev/pci: if_bgevar.h
Log Message:
use proplib
To generate a diff of this commit:
cvs rdiff -u -r1.43 -r1.44 src/sys/dev/mii/brgphy.c
cvs rdiff -u -r1.163 -r1.164 src/sys/dev/pci/if_bge.c
cvs rdiff -u -r1.51 -r1.52 src/sys/dev/pci/if_bgereg.h
cvs rdiff -u -r0 -r1.1 src/sys/dev/pci/if_bgevar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/mii/brgphy.c
diff -u src/sys/dev/mii/brgphy.c:1.43 src/sys/dev/mii/brgphy.c:1.44
--- src/sys/dev/mii/brgphy.c:1.43 Sun Apr 19 11:10:36 2009
+++ src/sys/dev/mii/brgphy.c Thu Apr 23 10:47:43 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: brgphy.c,v 1.43 2009/04/19 11:10:36 msaitoh Exp $ */
+/* $NetBSD: brgphy.c,v 1.44 2009/04/23 10:47:43 msaitoh Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -67,7 +67,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.43 2009/04/19 11:10:36 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.44 2009/04/23 10:47:43 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -75,6 +75,7 @@
#include <sys/device.h>
#include <sys/socket.h>
#include <sys/errno.h>
+#include <prop/proplib.h>
#include <net/if.h>
#include <net/if_media.h>
@@ -82,7 +83,6 @@
#include <dev/mii/mii.h>
#include <dev/mii/miivar.h>
#include <dev/mii/miidevs.h>
-
#include <dev/mii/brgphyreg.h>
#include <dev/pci/if_bgereg.h>
@@ -93,7 +93,15 @@
static int brgphymatch(device_t, cfdata_t, void *);
static void brgphyattach(device_t, device_t, void *);
-CFATTACH_DECL3_NEW(brgphy, sizeof(struct mii_softc),
+struct brgphy_softc {
+ struct mii_softc sc_mii;
+ int sc_isbge;
+ int sc_isbnx;
+ int sc_bge_flags;
+ int sc_bnx_flags;
+};
+
+CFATTACH_DECL3_NEW(brgphy, sizeof(struct brgphy_softc),
brgphymatch, brgphyattach, mii_phy_detach, mii_phy_activate, NULL, NULL,
DVF_DETACH_SHUTDOWN);
@@ -193,10 +201,13 @@
static void
brgphyattach(struct device *parent, struct device *self, void *aux)
{
- struct mii_softc *sc = device_private(self);
+ struct brgphy_softc *bsc = device_private(self);
+ struct mii_softc *sc = &bsc->sc_mii;
struct mii_attach_args *ma = aux;
struct mii_data *mii = ma->mii_data;
const struct mii_phydesc *mpd;
+ prop_dictionary_t dict;
+ const char *devname;
mpd = mii_phy_match(ma, brgphys);
aprint_naive(": Media interface\n");
@@ -226,6 +237,20 @@
else
mii_phy_add_media(sc);
aprint_normal("\n");
+
+ parent = device_parent(sc->mii_dev);
+ devname = parent->dv_cfdriver->cd_name;
+ if (strcmp(devname, "bge") == 0) {
+ bsc->sc_isbge = 1;
+ dict = device_properties(parent);
+ prop_dictionary_get_uint32(dict, "phyflags",
+ &bsc->sc_bge_flags);
+ } else if (strcmp(devname, "bnx") == 0) {
+ bsc->sc_isbnx = 1;
+ dict = device_properties(parent);
+ prop_dictionary_get_uint32(dict, "phyflags",
+ &bsc->sc_bnx_flags);
+ }
}
static int
@@ -476,13 +501,7 @@
static void
brgphy_reset(struct mii_softc *sc)
{
- struct bge_softc *bge_sc = NULL;
-#if 0
- struct bnx_softc *bnx_sc = NULL;
-#endif
- const char *devname;
-
- devname = device_parent(sc->mii_dev)->dv_cfdriver->cd_name;
+ struct brgphy_softc *bsc = (void *)sc;
mii_phy_reset(sc);
@@ -506,22 +525,21 @@
}
/* Handle any bge (NetXtreme/NetLink) workarounds. */
- if (strcmp(devname, "bge") == 0) {
+ if (bsc->sc_isbge != 0) {
if (!(sc->mii_flags & MIIF_HAVEFIBER)) {
- bge_sc = sc->mii_pdata->mii_ifp->if_softc;
- if (bge_sc->bge_flags & BGE_PHY_ADC_BUG)
+ if (bsc->sc_bge_flags & BGE_PHY_ADC_BUG)
brgphy_adc_bug(sc);
- if (bge_sc->bge_flags & BGE_PHY_5704_A0_BUG)
+ if (bsc->sc_bge_flags & BGE_PHY_5704_A0_BUG)
brgphy_5704_a0_bug(sc);
- if (bge_sc->bge_flags & BGE_PHY_BER_BUG)
+ if (bsc->sc_bge_flags & BGE_PHY_BER_BUG)
brgphy_ber_bug(sc);
- else if (bge_sc->bge_flags & BGE_PHY_JITTER_BUG) {
+ else if (bsc->sc_bge_flags & BGE_PHY_JITTER_BUG) {
PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0c00);
PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG,
0x000a);
- if (bge_sc->bge_flags & BGE_PHY_ADJUST_TRIM) {
+ if (bsc->sc_bge_flags & BGE_PHY_ADJUST_TRIM) {
PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT,
0x110b);
PHY_WRITE(sc, BRGPHY_TEST1,
@@ -533,12 +551,12 @@
PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0400);
}
- if (bge_sc->bge_flags & BGE_PHY_CRC_BUG)
+ if (bsc->sc_bge_flags & BGE_PHY_CRC_BUG)
brgphy_crc_bug(sc);
#if 0
/* Set Jumbo frame settings in the PHY. */
- if (bge_sc->bge_flags & BGE_JUMBO_CAP)
+ if (bsc->sc_bge_flags & BGE_JUMBO_CAP)
brgphy_jumbo_settings(sc);
#endif
@@ -548,11 +566,11 @@
#if 0
/* Enable ether...@wirespeed */
- if (!(bge_sc->bge_flags & BGE_NO_ETH_WIRE_SPEED))
+ if (!(bsc->sc_bge_flags & BGE_NO_ETH_WIRE_SPEED))
brgphy_eth_wirespeed(sc);
/* Enable Link LED on Dell boxes */
- if (bge_sc->bge_flags & BGE_NO_3LED) {
+ if (bsc->sc_bge_flags & BGE_NO_3LED) {
PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL)
& ~BRGPHY_PHY_EXTCTL_3_LED);
@@ -561,7 +579,7 @@
}
#if 0 /* not yet */
/* Handle any bnx (NetXtreme II) workarounds. */
- } else if (strcmp(devname, "bnx") == 0) {
+ } else if (sc->sc_isbnx != 0) {
bnx_sc = sc->mii_pdata->mii_ifp->if_softc;
if (sc->mii_mpd_model == MII_MODEL_xxBROADCOM2_BCM5708S) {
Index: src/sys/dev/pci/if_bge.c
diff -u src/sys/dev/pci/if_bge.c:1.163 src/sys/dev/pci/if_bge.c:1.164
--- src/sys/dev/pci/if_bge.c:1.163 Thu Apr 23 10:43:31 2009
+++ src/sys/dev/pci/if_bge.c Thu Apr 23 10:47:44 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bge.c,v 1.163 2009/04/23 10:43:31 msaitoh Exp $ */
+/* $NetBSD: if_bge.c,v 1.164 2009/04/23 10:47:44 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.163 2009/04/23 10:43:31 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.164 2009/04/23 10:47:44 msaitoh Exp $");
#include "bpfilter.h"
#include "vlan.h"
@@ -133,8 +133,10 @@
#include <dev/mii/brgphyreg.h>
#include <dev/pci/if_bgereg.h>
+#include <dev/pci/if_bgevar.h>
#include <uvm/uvm_extern.h>
+#include <prop/proplib.h>
#define ETHER_MIN_NOPAD (ETHER_MIN_LEN - ETHER_CRC_LEN) /* i.e., 60 */
@@ -2279,6 +2281,7 @@
{
struct bge_softc *sc = device_private(self);
struct pci_attach_args *pa = aux;
+ prop_dictionary_t dict;
const struct bge_product *bp;
const struct bge_revision *br;
pci_chipset_tag_t pc;
@@ -2664,6 +2667,9 @@
aprint_error_dev(self, "couldn't establish power handler\n");
else
pmf_class_network_register(self, ifp);
+
+ dict = device_properties(self);
+ prop_dictionary_set_uint32(dict, "phyflags", sc->bge_flags);
}
static void
Index: src/sys/dev/pci/if_bgereg.h
diff -u src/sys/dev/pci/if_bgereg.h:1.51 src/sys/dev/pci/if_bgereg.h:1.52
--- src/sys/dev/pci/if_bgereg.h:1.51 Sun Apr 19 11:10:36 2009
+++ src/sys/dev/pci/if_bgereg.h Thu Apr 23 10:47:44 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bgereg.h,v 1.51 2009/04/19 11:10:36 msaitoh Exp $ */
+/* $NetBSD: if_bgereg.h,v 1.52 2009/04/23 10:47:44 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
* Copyright (c) 1997, 1998, 1999, 2001
@@ -63,10 +63,6 @@
* recommended.
*/
-#include <machine/bus.h>
-#include <net/if_ether.h>
-#include <dev/pci/pcivar.h>
-
#define BGE_PAGE_ZERO 0x00000000
#define BGE_PAGE_ZERO_END 0x000000FF
#define BGE_SEND_RING_RCB 0x00000100
@@ -1900,16 +1896,6 @@
volatile u_int32_t bge_addr_lo;
} bge_hostaddr;
-static __inline void
-bge_set_hostaddr(volatile bge_hostaddr *x, bus_addr_t y)
-{
- x->bge_addr_lo = y & 0xffffffff;
- if (sizeof (bus_addr_t) == 8)
- x->bge_addr_hi = (u_int64_t)y >> 32;
- else
- x->bge_addr_hi = 0;
-}
-
/* Ring control block structure */
struct bge_rcb {
bge_hostaddr bge_hostaddr;
@@ -1919,11 +1905,6 @@
#define BGE_RCB_MAXLEN_FLAGS(maxlen, flags) ((maxlen) << 16 | (flags))
-#define RCB_WRITE_4(sc, rcb, offset, val) \
- bus_space_write_4(sc->bge_btag, sc->bge_bhandle, \
- rcb + offsetof(struct bge_rcb, offset), val)
-
-
#define BGE_RCB_FLAG_USE_EXT_RX_BD 0x0001
#define BGE_RCB_FLAG_RING_DISABLED 0x0002
@@ -2304,11 +2285,6 @@
#define BGE_MIN_FRAMELEN 60
/*
- * Other utility macros.
- */
-#define BGE_INC(x, y) (x) = (x + 1) % y
-
-/*
* Vital product data and structures.
*/
#define BGE_VPD_FLAG 0x8000
@@ -2330,139 +2306,7 @@
#define VPD_RES_WRITE 0x81 /* start of read/write area */
#define VPD_RES_END 0x78 /* end tag */
-
-/*
- * Register access macros. The Tigon always uses memory mapped register
- * accesses and all registers must be accessed with 32 bit operations.
- */
-
-#define CSR_WRITE_4(sc, reg, val) \
- bus_space_write_4(sc->bge_btag, sc->bge_bhandle, reg, val)
-
-#define CSR_READ_4(sc, reg) \
- bus_space_read_4(sc->bge_btag, sc->bge_bhandle, reg)
-
-#define BGE_SETBIT(sc, reg, x) \
- CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) | x))
-#define BGE_CLRBIT(sc, reg, x) \
- CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) & ~x))
-
-#define PCI_SETBIT(pc, tag, reg, x) \
- pci_conf_write(pc, tag, reg, (pci_conf_read(pc, tag, reg) | x))
-#define PCI_CLRBIT(pc, tag, reg, x) \
- pci_conf_write(pc, tag, reg, (pci_conf_read(pc, tag, reg) & ~x))
-
-/*
- * Memory management stuff. Note: the SSLOTS, MSLOTS and JSLOTS
- * values are tuneable. They control the actual amount of buffers
- * allocated for the standard, mini and jumbo receive rings.
- */
-
-#define BGE_SSLOTS 256
-#define BGE_MSLOTS 256
-#define BGE_JSLOTS 384
-#define BGE_RSLOTS 256
-
-#define BGE_JRAWLEN (BGE_JUMBO_FRAMELEN + ETHER_ALIGN)
-#define BGE_JLEN (BGE_JRAWLEN + (sizeof(u_int64_t) - \
- (BGE_JRAWLEN % sizeof(u_int64_t))))
-#define BGE_JPAGESZ PAGE_SIZE
-#define BGE_RESID (BGE_JPAGESZ - (BGE_JLEN * BGE_JSLOTS) % BGE_JPAGESZ)
-#define BGE_JMEM ((BGE_JLEN * BGE_JSLOTS) + BGE_RESID)
-
-/*
- * Ring structures. Most of these reside in host memory and we tell
- * the NIC where they are via the ring control blocks. The exceptions
- * are the tx and command rings, which live in NIC memory and which
- * we access via the shared memory window.
- */
-struct bge_ring_data {
- struct bge_rx_bd bge_rx_std_ring[BGE_STD_RX_RING_CNT];
- struct bge_rx_bd bge_rx_jumbo_ring[BGE_JUMBO_RX_RING_CNT];
- struct bge_rx_bd bge_rx_return_ring[BGE_RETURN_RING_CNT];
- struct bge_tx_bd bge_tx_ring[BGE_TX_RING_CNT];
- struct bge_status_block bge_status_block;
- struct bge_tx_desc *bge_tx_ring_nic;/* pointer to shared mem */
- struct bge_cmd_desc *bge_cmd_ring; /* pointer to shared mem */
- struct bge_gib bge_info;
-};
-
-#define BGE_RING_DMA_ADDR(sc, offset) \
- ((sc)->bge_ring_map->dm_segs[0].ds_addr + \
- offsetof(struct bge_ring_data, offset))
-
-/*
- * Number of DMA segments in a TxCB. Note that this is carefully
- * chosen to make the total struct size an even power of two. It's
- * critical that no TxCB be split across a page boundary since
- * no attempt is made to allocate physically contiguous memory.
- *
- */
-#if 0 /* pre-TSO values */
-#define BGE_TXDMA_MAX ETHER_MAX_LEN_JUMBO
-#ifdef _LP64
-#define BGE_NTXSEG 30
-#else
-#define BGE_NTXSEG 31
-#endif
-#else /* TSO values */
-#define BGE_TXDMA_MAX (round_page(IP_MAXPACKET)) /* for TSO */
-#ifdef _LP64
-#define BGE_NTXSEG 120 /* XXX just a guess */
-#else
-#define BGE_NTXSEG 124 /* XXX just a guess */
-#endif
-#endif /* TSO values */
-
-
-/*
- * Mbuf pointers. We need these to keep track of the virtual addresses
- * of our mbuf chains since we can only convert from physical to virtual,
- * not the other way around.
- */
-struct bge_chain_data {
- struct mbuf *bge_tx_chain[BGE_TX_RING_CNT];
- struct mbuf *bge_rx_std_chain[BGE_STD_RX_RING_CNT];
- struct mbuf *bge_rx_jumbo_chain[BGE_JUMBO_RX_RING_CNT];
- struct mbuf *bge_rx_mini_chain[BGE_MINI_RX_RING_CNT];
- bus_dmamap_t bge_rx_std_map[BGE_STD_RX_RING_CNT];
- bus_dmamap_t bge_rx_jumbo_map;
- /* Stick the jumbo mem management stuff here too. */
- void * bge_jslots[BGE_JSLOTS];
- void * bge_jumbo_buf;
-};
-
-#define BGE_JUMBO_DMA_ADDR(sc, m) \
- ((sc)->bge_cdata.bge_rx_jumbo_map->dm_segs[0].ds_addr + \
- (mtod((m), char *) - (char *)(sc)->bge_cdata.bge_jumbo_buf))
-
-struct bge_type {
- u_int16_t bge_vid;
- u_int16_t bge_did;
- char *bge_name;
-};
-
-#define BGE_TIMEOUT 1000
-#define BGE_TXCONS_UNSET 0xFFFF /* impossible value */
-
-struct bge_jpool_entry {
- int slot;
- SLIST_ENTRY(bge_jpool_entry) jpool_entries;
-};
-
-struct bge_bcom_hack {
- int reg;
- int val;
-};
-
-struct txdmamap_pool_entry {
- bus_dmamap_t dmamap;
- SLIST_ENTRY(txdmamap_pool_entry) link;
-};
-
-/*
- * Flags for bge_flags.
- */
+/* Flags for phyflags in proplib. */
#define BGE_TXRING_VALID 0x00000001
#define BGE_RXRING_VALID 0x00000002
#define BGE_JUMBO_RXRING_VALID 0x00000004
@@ -2478,71 +2322,3 @@
#define BGE_PHY_BER_BUG 0x00020000
#define BGE_PHY_ADJUST_TRIM 0x00040000
#define BGE_IS_5788 0x00100000
-
-struct bge_softc {
- device_t bge_dev;
- struct ethercom ethercom; /* interface info */
- bus_space_handle_t bge_bhandle;
- bus_space_tag_t bge_btag;
- void *bge_intrhand;
- pci_chipset_tag_t sc_pc;
- pcitag_t sc_pcitag;
-
- struct mii_data bge_mii;
- struct ifmedia bge_ifmedia; /* media info */
- u_int8_t bge_extram; /* has external SSRAM */
- u_int32_t bge_return_ring_cnt;
- u_int32_t bge_tx_prodidx;
- bus_dma_tag_t bge_dmatag;
- u_int32_t bge_chipid;
- u_int32_t bge_local_ctrl_reg;
- struct bge_ring_data *bge_rdata; /* rings */
- struct bge_chain_data bge_cdata; /* mbufs */
- bus_dmamap_t bge_ring_map;
- u_int16_t bge_tx_saved_considx;
- u_int16_t bge_rx_saved_considx;
- u_int16_t bge_ev_saved_considx;
- u_int16_t bge_std; /* current std ring head */
- u_int16_t bge_jumbo; /* current jumo ring head */
- SLIST_HEAD(__bge_jfreehead, bge_jpool_entry) bge_jfree_listhead;
- SLIST_HEAD(__bge_jinusehead, bge_jpool_entry) bge_jinuse_listhead;
- u_int32_t bge_stat_ticks;
- u_int32_t bge_rx_coal_ticks;
- u_int32_t bge_tx_coal_ticks;
- u_int32_t bge_rx_max_coal_bds;
- u_int32_t bge_tx_max_coal_bds;
- u_int32_t bge_tx_buf_ratio;
- uint32_t bge_sts;
-#define BGE_STS_LINK 0x00000001 /* MAC link status */
-#define BGE_STS_LINK_EVT 0x00000002 /* pending link event */
-#define BGE_STS_AUTOPOLL 0x00000004 /* PHY auto-polling */
-#define BGE_STS_BIT(sc, x) ((sc)->bge_sts & (x))
-#define BGE_STS_SETBIT(sc, x) ((sc)->bge_sts |= (x))
-#define BGE_STS_CLRBIT(sc, x) ((sc)->bge_sts &= ~(x))
- int bge_if_flags;
- int bge_flags;
- int bge_flowflags;
-#ifdef BGE_EVENT_COUNTERS
- /*
- * Event counters.
- */
- struct evcnt bge_ev_intr; /* interrupts */
- struct evcnt bge_ev_tx_xoff; /* send PAUSE(len>0) packets */
- struct evcnt bge_ev_tx_xon; /* send PAUSE(len=0) packets */
- struct evcnt bge_ev_rx_xoff; /* receive PAUSE(len>0) packets */
- struct evcnt bge_ev_rx_xon; /* receive PAUSE(len=0) packets */
- struct evcnt bge_ev_rx_macctl; /* receive MAC control packets */
- struct evcnt bge_ev_xoffentered;/* XOFF state entered */
-#endif /* BGE_EVENT_COUNTERS */
- int bge_txcnt;
- struct callout bge_timeout;
- char *bge_vpd_prodname;
- char *bge_vpd_readonly;
- int bge_pending_rxintr_change;
- SLIST_HEAD(, txdmamap_pool_entry) txdma_list;
- struct txdmamap_pool_entry *txdma[BGE_TX_RING_CNT];
-
-#if NRND > 0
- rndsource_element_t rnd_source; /* random source */
-#endif
-};
Added files:
Index: src/sys/dev/pci/if_bgevar.h
diff -u /dev/null src/sys/dev/pci/if_bgevar.h:1.1
--- /dev/null Thu Apr 23 10:47:44 2009
+++ src/sys/dev/pci/if_bgevar.h Thu Apr 23 10:47:44 2009
@@ -0,0 +1,289 @@
+/* $NetBSD: if_bgevar.h,v 1.1 2009/04/23 10:47:44 msaitoh Exp $ */
+/*
+ * Copyright (c) 2001 Wind River Systems
+ * Copyright (c) 1997, 1998, 1999, 2001
+ * Bill Paul <wp...@windriver.com>. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Bill Paul.
+ * 4. Neither the name of the author nor the names of any co-contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD: if_bgereg.h,v 1.1.2.7 2002/11/02 18:17:55 mp Exp $
+ */
+
+/*
+ * BCM570x memory map. The internal memory layout varies somewhat
+ * depending on whether or not we have external SSRAM attached.
+ * The BCM5700 can have up to 16MB of external memory. The BCM5701
+ * is apparently not designed to use external SSRAM. The mappings
+ * up to the first 4 send rings are the same for both internal and
+ * external memory configurations. Note that mini RX ring space is
+ * only available with external SSRAM configurations, which means
+ * the mini RX ring is not supported on the BCM5701.
+ *
+ * The NIC's memory can be accessed by the host in one of 3 ways:
+ *
+ * 1) Indirect register access. The MEMWIN_BASEADDR and MEMWIN_DATA
+ * registers in PCI config space can be used to read any 32-bit
+ * address within the NIC's memory.
+ *
+ * 2) Memory window access. The MEMWIN_BASEADDR register in PCI config
+ * space can be used in conjunction with the memory window in the
+ * device register space at offset 0x8000 to read any 32K chunk
+ * of NIC memory.
+ *
+ * 3) Flat mode. If the 'flat mode' bit in the PCI state register is
+ * set, the device I/O mapping consumes 32MB of host address space,
+ * allowing all of the registers and internal NIC memory to be
+ * accessed directly. NIC memory addresses are offset by 0x01000000.
+ * Flat mode consumes so much host address space that it is not
+ * recommended.
+ */
+
+#ifndef _DEV_PCI_IF_BGEVAR_H_
+#define _DEV_PCI_IF_BGEVAR_H_
+
+#include <machine/bus.h>
+#include <net/if_ether.h>
+#include <dev/pci/pcivar.h>
+
+static __inline void
+bge_set_hostaddr(volatile bge_hostaddr *x, bus_addr_t y)
+{
+ x->bge_addr_lo = y & 0xffffffff;
+ if (sizeof (bus_addr_t) == 8)
+ x->bge_addr_hi = (u_int64_t)y >> 32;
+ else
+ x->bge_addr_hi = 0;
+}
+
+#define RCB_WRITE_4(sc, rcb, offset, val) \
+ bus_space_write_4(sc->bge_btag, sc->bge_bhandle, \
+ rcb + offsetof(struct bge_rcb, offset), val)
+
+/*
+ * Other utility macros.
+ */
+#define BGE_INC(x, y) (x) = (x + 1) % y
+
+/*
+ * Register access macros. The Tigon always uses memory mapped register
+ * accesses and all registers must be accessed with 32 bit operations.
+ */
+
+#define CSR_WRITE_4(sc, reg, val) \
+ bus_space_write_4(sc->bge_btag, sc->bge_bhandle, reg, val)
+
+#define CSR_READ_4(sc, reg) \
+ bus_space_read_4(sc->bge_btag, sc->bge_bhandle, reg)
+
+#define BGE_SETBIT(sc, reg, x) \
+ CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) | x))
+#define BGE_CLRBIT(sc, reg, x) \
+ CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) & ~x))
+
+#define PCI_SETBIT(pc, tag, reg, x) \
+ pci_conf_write(pc, tag, reg, (pci_conf_read(pc, tag, reg) | x))
+#define PCI_CLRBIT(pc, tag, reg, x) \
+ pci_conf_write(pc, tag, reg, (pci_conf_read(pc, tag, reg) & ~x))
+
+/*
+ * Memory management stuff. Note: the SSLOTS, MSLOTS and JSLOTS
+ * values are tuneable. They control the actual amount of buffers
+ * allocated for the standard, mini and jumbo receive rings.
+ */
+
+#define BGE_SSLOTS 256
+#define BGE_MSLOTS 256
+#define BGE_JSLOTS 384
+#define BGE_RSLOTS 256
+
+#define BGE_JRAWLEN (BGE_JUMBO_FRAMELEN + ETHER_ALIGN)
+#define BGE_JLEN (BGE_JRAWLEN + (sizeof(u_int64_t) - \
+ (BGE_JRAWLEN % sizeof(u_int64_t))))
+#define BGE_JPAGESZ PAGE_SIZE
+#define BGE_RESID (BGE_JPAGESZ - (BGE_JLEN * BGE_JSLOTS) % BGE_JPAGESZ)
+#define BGE_JMEM ((BGE_JLEN * BGE_JSLOTS) + BGE_RESID)
+
+/*
+ * Ring structures. Most of these reside in host memory and we tell
+ * the NIC where they are via the ring control blocks. The exceptions
+ * are the tx and command rings, which live in NIC memory and which
+ * we access via the shared memory window.
+ */
+struct bge_ring_data {
+ struct bge_rx_bd bge_rx_std_ring[BGE_STD_RX_RING_CNT];
+ struct bge_rx_bd bge_rx_jumbo_ring[BGE_JUMBO_RX_RING_CNT];
+ struct bge_rx_bd bge_rx_return_ring[BGE_RETURN_RING_CNT];
+ struct bge_tx_bd bge_tx_ring[BGE_TX_RING_CNT];
+ struct bge_status_block bge_status_block;
+ struct bge_tx_desc *bge_tx_ring_nic;/* pointer to shared mem */
+ struct bge_cmd_desc *bge_cmd_ring; /* pointer to shared mem */
+ struct bge_gib bge_info;
+};
+
+#define BGE_RING_DMA_ADDR(sc, offset) \
+ ((sc)->bge_ring_map->dm_segs[0].ds_addr + \
+ offsetof(struct bge_ring_data, offset))
+
+/*
+ * Number of DMA segments in a TxCB. Note that this is carefully
+ * chosen to make the total struct size an even power of two. It's
+ * critical that no TxCB be split across a page boundary since
+ * no attempt is made to allocate physically contiguous memory.
+ *
+ */
+#if 0 /* pre-TSO values */
+#define BGE_TXDMA_MAX ETHER_MAX_LEN_JUMBO
+#ifdef _LP64
+#define BGE_NTXSEG 30
+#else
+#define BGE_NTXSEG 31
+#endif
+#else /* TSO values */
+#define BGE_TXDMA_MAX (round_page(IP_MAXPACKET)) /* for TSO */
+#ifdef _LP64
+#define BGE_NTXSEG 120 /* XXX just a guess */
+#else
+#define BGE_NTXSEG 124 /* XXX just a guess */
+#endif
+#endif /* TSO values */
+
+
+/*
+ * Mbuf pointers. We need these to keep track of the virtual addresses
+ * of our mbuf chains since we can only convert from physical to virtual,
+ * not the other way around.
+ */
+struct bge_chain_data {
+ struct mbuf *bge_tx_chain[BGE_TX_RING_CNT];
+ struct mbuf *bge_rx_std_chain[BGE_STD_RX_RING_CNT];
+ struct mbuf *bge_rx_jumbo_chain[BGE_JUMBO_RX_RING_CNT];
+ struct mbuf *bge_rx_mini_chain[BGE_MINI_RX_RING_CNT];
+ bus_dmamap_t bge_rx_std_map[BGE_STD_RX_RING_CNT];
+ bus_dmamap_t bge_rx_jumbo_map;
+ /* Stick the jumbo mem management stuff here too. */
+ void * bge_jslots[BGE_JSLOTS];
+ void * bge_jumbo_buf;
+};
+
+#define BGE_JUMBO_DMA_ADDR(sc, m) \
+ ((sc)->bge_cdata.bge_rx_jumbo_map->dm_segs[0].ds_addr + \
+ (mtod((m), char *) - (char *)(sc)->bge_cdata.bge_jumbo_buf))
+
+struct bge_type {
+ u_int16_t bge_vid;
+ u_int16_t bge_did;
+ char *bge_name;
+};
+
+#define BGE_TIMEOUT 1000
+#define BGE_TXCONS_UNSET 0xFFFF /* impossible value */
+
+struct bge_jpool_entry {
+ int slot;
+ SLIST_ENTRY(bge_jpool_entry) jpool_entries;
+};
+
+struct bge_bcom_hack {
+ int reg;
+ int val;
+};
+
+struct txdmamap_pool_entry {
+ bus_dmamap_t dmamap;
+ SLIST_ENTRY(txdmamap_pool_entry) link;
+};
+
+struct bge_softc {
+ device_t bge_dev;
+ struct ethercom ethercom; /* interface info */
+ bus_space_handle_t bge_bhandle;
+ bus_space_tag_t bge_btag;
+ void *bge_intrhand;
+ pci_chipset_tag_t sc_pc;
+ pcitag_t sc_pcitag;
+
+ struct mii_data bge_mii;
+ struct ifmedia bge_ifmedia; /* media info */
+ u_int8_t bge_extram; /* has external SSRAM */
+ u_int32_t bge_return_ring_cnt;
+ u_int32_t bge_tx_prodidx;
+ bus_dma_tag_t bge_dmatag;
+ u_int32_t bge_chipid;
+ u_int32_t bge_local_ctrl_reg;
+ struct bge_ring_data *bge_rdata; /* rings */
+ struct bge_chain_data bge_cdata; /* mbufs */
+ bus_dmamap_t bge_ring_map;
+ u_int16_t bge_tx_saved_considx;
+ u_int16_t bge_rx_saved_considx;
+ u_int16_t bge_ev_saved_considx;
+ u_int16_t bge_std; /* current std ring head */
+ u_int16_t bge_jumbo; /* current jumo ring head */
+ SLIST_HEAD(__bge_jfreehead, bge_jpool_entry) bge_jfree_listhead;
+ SLIST_HEAD(__bge_jinusehead, bge_jpool_entry) bge_jinuse_listhead;
+ u_int32_t bge_stat_ticks;
+ u_int32_t bge_rx_coal_ticks;
+ u_int32_t bge_tx_coal_ticks;
+ u_int32_t bge_rx_max_coal_bds;
+ u_int32_t bge_tx_max_coal_bds;
+ u_int32_t bge_tx_buf_ratio;
+ uint32_t bge_sts;
+#define BGE_STS_LINK 0x00000001 /* MAC link status */
+#define BGE_STS_LINK_EVT 0x00000002 /* pending link event */
+#define BGE_STS_AUTOPOLL 0x00000004 /* PHY auto-polling */
+#define BGE_STS_BIT(sc, x) ((sc)->bge_sts & (x))
+#define BGE_STS_SETBIT(sc, x) ((sc)->bge_sts |= (x))
+#define BGE_STS_CLRBIT(sc, x) ((sc)->bge_sts &= ~(x))
+ int bge_if_flags;
+ uint32_t bge_flags;
+ int bge_flowflags;
+#ifdef BGE_EVENT_COUNTERS
+ /*
+ * Event counters.
+ */
+ struct evcnt bge_ev_intr; /* interrupts */
+ struct evcnt bge_ev_tx_xoff; /* send PAUSE(len>0) packets */
+ struct evcnt bge_ev_tx_xon; /* send PAUSE(len=0) packets */
+ struct evcnt bge_ev_rx_xoff; /* receive PAUSE(len>0) packets */
+ struct evcnt bge_ev_rx_xon; /* receive PAUSE(len=0) packets */
+ struct evcnt bge_ev_rx_macctl; /* receive MAC control packets */
+ struct evcnt bge_ev_xoffentered;/* XOFF state entered */
+#endif /* BGE_EVENT_COUNTERS */
+ int bge_txcnt;
+ struct callout bge_timeout;
+ char *bge_vpd_prodname;
+ char *bge_vpd_readonly;
+ int bge_pending_rxintr_change;
+ SLIST_HEAD(, txdmamap_pool_entry) txdma_list;
+ struct txdmamap_pool_entry *txdma[BGE_TX_RING_CNT];
+
+#if NRND > 0
+ rndsource_element_t rnd_source; /* random source */
+#endif
+};
+
+#endif /* _DEV_PCI_IF_BGEVAR_H_ */
