Module Name:    src
Committed By:   snj
Date:           Tue Jun  9 17:48:20 UTC 2009

Modified Files:
        src/sys/arch/mips/include [netbsd-5-0]: locore.h
        src/sys/arch/mips/mips [netbsd-5-0]: locore_mips1.S mipsX_subr.S
            mips_machdep.c vm_machdep.c

Log Message:
Pull up following revision(s) (requested by martin in ticket #799):
        sys/arch/mips/include/locore.h: revision 1.79
        sys/arch/mips/mips/locore_mips1.S: revision 1.65
        sys/arch/mips/mips/mipsX_subr.S: revision 1.28
        sys/arch/mips/mips/mips_machdep.c: revision 1.211
        sys/arch/mips/mips/vm_machdep.c: revision 1.123
Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().


To generate a diff of this commit:
cvs rdiff -u -r1.78 -r1.78.36.1 src/sys/arch/mips/include/locore.h
cvs rdiff -u -r1.64 -r1.64.26.1 src/sys/arch/mips/mips/locore_mips1.S
cvs rdiff -u -r1.26 -r1.26.36.1 src/sys/arch/mips/mips/mipsX_subr.S
cvs rdiff -u -r1.205.4.1 -r1.205.4.1.2.1 \
    src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.121 -r1.121.6.1 src/sys/arch/mips/mips/vm_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/mips/include/locore.h
diff -u src/sys/arch/mips/include/locore.h:1.78 src/sys/arch/mips/include/locore.h:1.78.36.1
--- src/sys/arch/mips/include/locore.h:1.78	Wed Oct 17 19:55:36 2007
+++ src/sys/arch/mips/include/locore.h	Tue Jun  9 17:48:20 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.78 2007/10/17 19:55:36 garbled Exp $ */
+/* $NetBSD: locore.h,v 1.78.36.1 2009/06/09 17:48:20 snj Exp $ */
 
 /*
  * Copyright 1996 The Board of Trustees of The Leland Stanford
@@ -53,6 +53,7 @@
 int	mips1_TLBUpdate(u_int, u_int);
 void	mips1_wbflush(void);
 void	mips1_lwp_trampoline(void);
+void	mips1_setfunc_trampoline(void);
 void	mips1_cpu_switch_resume(void);
 
 uint32_t tx3900_cp0_config_read(void);
@@ -68,6 +69,7 @@
 void	mips3_TLBWriteIndexedVPS(int, struct tlb *);
 void	mips3_wbflush(void);
 void	mips3_lwp_trampoline(void);
+void	mips3_setfunc_trampoline(void);
 void	mips3_cpu_switch_resume(void);
 void	mips3_pagezero(void *dst);
 
@@ -81,6 +83,7 @@
 void	mips5900_TLBWriteIndexedVPS(int, struct tlb *);
 void	mips5900_wbflush(void);
 void	mips5900_lwp_trampoline(void);
+void	mips5900_setfunc_trampoline(void);
 void	mips5900_cpu_switch_resume(void);
 void	mips5900_pagezero(void *dst);
 #endif
@@ -96,6 +99,7 @@
 void	mips32_TLBWriteIndexedVPS(int, struct tlb *);
 void	mips32_wbflush(void);
 void	mips32_lwp_trampoline(void);
+void	mips32_setfunc_trampoline(void);
 void	mips32_cpu_switch_resume(void);
 #endif
 
@@ -109,6 +113,7 @@
 void	mips64_TLBWriteIndexedVPS(int, struct tlb *);
 void	mips64_wbflush(void);
 void	mips64_lwp_trampoline(void);
+void	mips64_setfunc_trampoline(void);
 void	mips64_cpu_switch_resume(void);
 void	mips64_pagezero(void *dst);
 #endif
@@ -235,6 +240,7 @@
 #define MachTLBUpdate		mips1_TLBUpdate
 #define wbflush()		mips1_wbflush()
 #define lwp_trampoline		mips1_lwp_trampoline
+#define setfunc_trampoline	mips1_setfunc_trampoline
 #elif !defined(MIPS1) &&  defined(MIPS3) && !defined(MIPS32) && !defined(MIPS64) && !defined(MIPS3_5900)
 #define MachSetPID		mips3_SetPID
 #define MIPS_TBIAP()		mips3_TBIAP(mips_num_tlb_entries)
@@ -242,6 +248,7 @@
 #define MachTLBUpdate		mips3_TLBUpdate
 #define MachTLBWriteIndexedVPS	mips3_TLBWriteIndexedVPS
 #define lwp_trampoline		mips3_lwp_trampoline
+#define setfunc_trampoline	mips3_setfunc_trampoline
 #define wbflush()		mips3_wbflush()
 #elif !defined(MIPS1) && !defined(MIPS3) &&  defined(MIPS32) && !defined(MIPS64)
 #define MachSetPID		mips32_SetPID
@@ -250,6 +257,7 @@
 #define MachTLBUpdate		mips32_TLBUpdate
 #define MachTLBWriteIndexedVPS	mips32_TLBWriteIndexedVPS
 #define lwp_trampoline		mips32_lwp_trampoline
+#define setfunc_trampoline	mips32_setfunc_trampoline
 #define wbflush()		mips32_wbflush()
 #elif !defined(MIPS1) && !defined(MIPS3) && !defined(MIPS32) &&  defined(MIPS64)
  /* all common with mips3 */
@@ -259,6 +267,7 @@
 #define MachTLBUpdate		mips64_TLBUpdate
 #define MachTLBWriteIndexedVPS	mips64_TLBWriteIndexedVPS
 #define lwp_trampoline		mips64_lwp_trampoline
+#define setfunc_trampoline	mips64_setfunc_trampoline
 #define wbflush()		mips64_wbflush()
 #elif !defined(MIPS1) &&  defined(MIPS3) && !defined(MIPS32) && !defined(MIPS64) && defined(MIPS3_5900)
 #define MachSetPID		mips5900_SetPID
@@ -267,6 +276,7 @@
 #define MachTLBUpdate		mips5900_TLBUpdate
 #define MachTLBWriteIndexedVPS	mips5900_TLBWriteIndexedVPS
 #define lwp_trampoline		mips5900_lwp_trampoline
+#define setfunc_trampoline	mips5900_setfunc_trampoline
 #define wbflush()		mips5900_wbflush()
 #else
 #define MachSetPID		(*(mips_locore_jumpvec.setTLBpid))
@@ -275,6 +285,7 @@
 #define MachTLBUpdate		(*(mips_locore_jumpvec.tlbUpdate))
 #define wbflush()		(*(mips_locore_jumpvec.wbflush))()
 #define lwp_trampoline		(mips_locoresw[1])
+#define setfunc_trampoline	(mips_locoresw[3])
 #endif
 
 #define CPU_IDLE		(mips_locoresw[2])

Index: src/sys/arch/mips/mips/locore_mips1.S
diff -u src/sys/arch/mips/mips/locore_mips1.S:1.64 src/sys/arch/mips/mips/locore_mips1.S:1.64.26.1
--- src/sys/arch/mips/mips/locore_mips1.S:1.64	Sat Jan 26 14:40:08 2008
+++ src/sys/arch/mips/mips/locore_mips1.S	Tue Jun  9 17:48:20 2009
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore_mips1.S,v 1.64 2008/01/26 14:40:08 tsutsui Exp $	*/
+/*	$NetBSD: locore_mips1.S,v 1.64.26.1 2009/06/09 17:48:20 snj Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -1090,6 +1090,21 @@
 END(mips1_lwp_trampoline)
 
 /*
+ * Like lwp_trampoline, but do not call lwp_startup
+ */
+LEAF(mips1_setfunc_trampoline)
+	addu	sp, sp, -CALLFRAME_SIZ
+
+	# Call the routine specified by cpu_setfunc()
+	jal	ra, s0			
+	move	a0, s1
+
+	j	mips1_xcpt_return
+	nop
+
+END(mips1_setfunc_trampoline)
+
+/*
  * void mips1_cpu_switch_resume(struct lwp *newlwp)
  *
  * Wiredown the USPACE of newproc with TLB entry#0 and #1.  Check
@@ -1249,6 +1264,7 @@
 	.word _C_LABEL(mips1_cpu_switch_resume)
 	.word _C_LABEL(mips1_lwp_trampoline)
 	.word _C_LABEL(nullop)			# idle
+	.word _C_LABEL(mips1_setfunc_trampoline)
 
 mips1_excpt_sw:
 	####

Index: src/sys/arch/mips/mips/mipsX_subr.S
diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.26 src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1
--- src/sys/arch/mips/mips/mipsX_subr.S:1.26	Wed Oct 17 19:55:39 2007
+++ src/sys/arch/mips/mips/mipsX_subr.S	Tue Jun  9 17:48:20 2009
@@ -1,4 +1,4 @@
-/*	$NetBSD: mipsX_subr.S,v 1.26 2007/10/17 19:55:39 garbled Exp $	*/
+/*	$NetBSD: mipsX_subr.S,v 1.26.36.1 2009/06/09 17:48:20 snj Exp $	*/
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -1955,6 +1955,7 @@
 	# saved if EXL=1.
 	#
 	.set	noat
+1:
 	mtc0	zero, MIPS_COP_0_STATUS		# disable int
 	COP0_SYNC
 	nop					# 3 op delay
@@ -2024,6 +2025,22 @@
 END(MIPSX(lwp_trampoline))
 
 /*
+ * Like lwp_trampoline, but do not call lwp_startup
+ */
+LEAF(MIPSX(setfunc_trampoline))
+	addu	sp, sp, -CALLFRAME_SIZ
+
+	# Call the routine specified by cpu_setfunc()
+	jal	ra, s0			
+	move	a0, s1
+
+	j	1b
+	nop
+
+END(MIPSX(setfunc_trampoline))
+
+
+/*
  * void mipsN_cpu_switch_resume(struct lwp *newlwp)
  *
  * Wiredown the USPACE of newproc in TLB entry#0.  Check whether target
@@ -2288,6 +2305,7 @@
 	.word _C_LABEL(MIPSX(cpu_switch_resume))
 	.word _C_LABEL(MIPSX(lwp_trampoline))
 	.word _C_LABEL(nullop)
+	.word _C_LABEL(MIPSX(setfunc_trampoline))
 
 MIPSX(excpt_sw):
 	####

Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1	Mon Feb  2 03:30:33 2009
+++ src/sys/arch/mips/mips/mips_machdep.c	Tue Jun  9 17:48:20 2009
@@ -1,4 +1,4 @@
-/*	$NetBSD: mips_machdep.c,v 1.205.4.1 2009/02/02 03:30:33 snj Exp $	*/
+/*	$NetBSD: mips_machdep.c,v 1.205.4.1.2.1 2009/06/09 17:48:20 snj Exp $	*/
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -112,7 +112,7 @@
 
 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
 
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.205.4.1 2009/02/02 03:30:33 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.205.4.1.2.1 2009/06/09 17:48:20 snj Exp $");
 
 #include "opt_cputype.h"
 
@@ -193,7 +193,7 @@
 
 mips_locore_jumpvec_t mips_locore_jumpvec;
 
-long *mips_locoresw[3];
+long *mips_locoresw[4];
 
 int cpu_arch;
 int cpu_mhz;

Index: src/sys/arch/mips/mips/vm_machdep.c
diff -u src/sys/arch/mips/mips/vm_machdep.c:1.121 src/sys/arch/mips/mips/vm_machdep.c:1.121.6.1
--- src/sys/arch/mips/mips/vm_machdep.c:1.121	Wed Oct 15 06:51:18 2008
+++ src/sys/arch/mips/mips/vm_machdep.c	Tue Jun  9 17:48:20 2009
@@ -1,4 +1,4 @@
-/*	$NetBSD: vm_machdep.c,v 1.121 2008/10/15 06:51:18 wrstuden Exp $	*/
+/*	$NetBSD: vm_machdep.c,v 1.121.6.1 2009/06/09 17:48:20 snj Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -80,7 +80,7 @@
 #include "opt_coredump.h"
 
 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.121 2008/10/15 06:51:18 wrstuden Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.121.6.1 2009/06/09 17:48:20 snj Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -199,7 +199,7 @@
 	pcb->pcb_context[1] = (intptr_t)arg;			/* S1 */
 	pcb->pcb_context[MIPS_CURLWP_CARD - 16] = (intptr_t)l;	/* S? */
 	pcb->pcb_context[8] = (intptr_t)f;			/* SP */
-	pcb->pcb_context[10] = (intptr_t)lwp_trampoline;	/* RA */
+	pcb->pcb_context[10] = (intptr_t)setfunc_trampoline;	/* RA */
 #ifdef IPL_ICU_MASK
 	pcb->pcb_ppl = 0;	/* machine depenedend interrupt mask */
 #endif

Reply via email to