Module Name: src
Committed By: mbalmer
Date: Sat Jul 25 16:17:10 UTC 2009
Modified Files:
src/sys/dev/gpio: files.gpio gpio.c gpioow.c gpiovar.h
src/sys/sys: gpio.h
Added Files:
src/sys/dev/gpio: gpiosim.c
Log Message:
Rework the GPIO framework. Tie it to the kauth(9) framework to control
access to the GPIO pins. Device drivers using GPIO pins can now be
attached and detached at runtime. GPIO pins can be named for easier
reference from userland programs. Introduce a new gpiosim(4) driver,
which is used for development.
Reviewed by many.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/dev/gpio/files.gpio
cvs rdiff -u -r1.18 -r1.19 src/sys/dev/gpio/gpio.c
cvs rdiff -u -r1.6 -r1.7 src/sys/dev/gpio/gpioow.c
cvs rdiff -u -r0 -r1.1 src/sys/dev/gpio/gpiosim.c
cvs rdiff -u -r1.7 -r1.8 src/sys/dev/gpio/gpiovar.h
cvs rdiff -u -r1.3 -r1.4 src/sys/sys/gpio.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/gpio/files.gpio
diff -u src/sys/dev/gpio/files.gpio:1.4 src/sys/dev/gpio/files.gpio:1.5
--- src/sys/dev/gpio/files.gpio:1.4 Fri Apr 7 18:55:21 2006
+++ src/sys/dev/gpio/files.gpio Sat Jul 25 16:17:10 2009
@@ -1,11 +1,17 @@
-# $NetBSD: files.gpio,v 1.4 2006/04/07 18:55:21 riz Exp $
+# $NetBSD: files.gpio,v 1.5 2009/07/25 16:17:10 mbalmer Exp $
-define gpio {offset, mask}
+define gpio {[offset = -1], [mask = 0]}
device gpio: gpio
attach gpio at gpiobus
file dev/gpio/gpio.c gpio needs-flag
+# GPIO simulator
+device gpiosim: gpiobus
+attach gpiosim at root
+file dev/gpio/gpiosim.c gpiosim needs-flag
+
+# 1-Wire bus bit-banging
device gpioow: onewirebus, onewire_bitbang
attach gpioow at gpio
file dev/gpio/gpioow.c gpioow
Index: src/sys/dev/gpio/gpio.c
diff -u src/sys/dev/gpio/gpio.c:1.18 src/sys/dev/gpio/gpio.c:1.19
--- src/sys/dev/gpio/gpio.c:1.18 Thu Apr 2 00:09:33 2009
+++ src/sys/dev/gpio/gpio.c Sat Jul 25 16:17:10 2009
@@ -1,7 +1,8 @@
-/* $NetBSD: gpio.c,v 1.18 2009/04/02 00:09:33 dyoung Exp $ */
+/* $NetBSD: gpio.c,v 1.19 2009/07/25 16:17:10 mbalmer Exp $ */
/* $OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $ */
/*
+ * Copyright (c) 2008, 2009 Marc Balmer <m...@msys.ch>
* Copyright (c) 2004, 2006 Alexander Yurchenko <gra...@openbsd.org>
*
* Permission to use, copy, modify, and distribute this software for any
@@ -18,7 +19,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.18 2009/04/02 00:09:33 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.19 2009/07/25 16:17:10 mbalmer Exp $");
/*
* General Purpose Input/Output framework.
@@ -28,32 +29,50 @@
#include <sys/systm.h>
#include <sys/conf.h>
#include <sys/device.h>
+#include <sys/fcntl.h>
#include <sys/ioctl.h>
#include <sys/gpio.h>
#include <sys/vnode.h>
+#include <sys/kmem.h>
+#include <sys/queue.h>
+#include <sys/kauth.h>
#include <dev/gpio/gpiovar.h>
#include "locators.h"
-struct gpio_softc {
- device_t sc_dev;
+#ifdef GPIO_DEBUG
+#define DPRINTF(n, x) do { if (gpiodebug > (n)) printf x; } while (0)
+int gpiodebug = 0;
+#else
+#define DPRINTFN(n, x)
+#endif
+#define DPRINTF(x) DPRINTFN(0, x)
- gpio_chipset_tag_t sc_gc; /* our GPIO controller */
- gpio_pin_t *sc_pins; /* pins array */
- int sc_npins; /* total number of pins */
+struct gpio_softc {
+ device_t sc_dev;
- int sc_opened;
- int sc_dying;
+ gpio_chipset_tag_t sc_gc; /* GPIO controller */
+ gpio_pin_t *sc_pins; /* pins array */
+ int sc_npins; /* number of pins */
+
+ int sc_opened;
+ LIST_HEAD(, gpio_dev) sc_devs; /* devices */
+ LIST_HEAD(, gpio_name) sc_names; /* named pins */
};
int gpio_match(device_t, cfdata_t, void *);
+int gpio_submatch(device_t, cfdata_t, const int *, void *);
void gpio_attach(device_t, device_t, void *);
bool gpio_resume(device_t PMF_FN_PROTO);
int gpio_detach(device_t, int);
int gpio_activate(device_t, enum devact);
int gpio_search(device_t, cfdata_t, const int *, void *);
int gpio_print(void *, const char *);
+int gpio_pinbyname(struct gpio_softc *, char *);
+
+/* Old API */
+int gpio_ioctl_oapi(struct gpio_softc *, u_long, void *, int, kauth_cred_t);
CFATTACH_DECL3_NEW(gpio, sizeof(struct gpio_softc),
gpio_match, gpio_attach, gpio_detach, gpio_activate, NULL, NULL,
@@ -73,8 +92,18 @@
int
gpio_match(device_t parent, cfdata_t cf, void *aux)
{
+ return 1;
+}
+
+int
+gpio_submatch(device_t parent, cfdata_t cf, const int *ip, void *aux)
+{
+ struct gpio_attach_args *ga = aux;
- return (1);
+ if (ga->ga_offset == -1)
+ return 0;
+
+ return strcmp(ga->ga_dvname, cf->cf_name) == 0;
}
bool
@@ -128,24 +157,22 @@
mn = device_unit(self);
vdevgone(maj, mn, mn, VCHR);
#endif
-
- return (0);
+ return 0;
}
int
gpio_activate(device_t self, enum devact act)
{
- struct gpio_softc *sc = device_private(self);
-
+ printf("gpio_active: ");
switch (act) {
case DVACT_ACTIVATE:
- return (EOPNOTSUPP);
+ DPRINTF(("ACTIVATE\n"));
+ return EOPNOTSUPP;
case DVACT_DEACTIVATE:
- sc->sc_dying = 1;
+ DPRINTF(("DEACTIVATE\n"));
break;
}
-
- return (0);
+ return 0;
}
int
@@ -161,7 +188,7 @@
if (config_match(parent, cf, &ga) > 0)
config_attach(parent, cf, &ga, gpio_print);
- return (0);
+ return 0;
}
int
@@ -175,7 +202,7 @@
if (ga->ga_mask & (1 << i))
printf(" %d", ga->ga_offset + i);
- return (UNCONF);
+ return UNCONF;
}
int
@@ -185,9 +212,9 @@
struct gpiobus_attach_args *gba = aux;
#endif
if (pnp != NULL)
- printf("%s at %s", "gpiobus", pnp);
+ printf("gpiobus at %s", pnp);
- return (UNCONF);
+ return UNCONF;
}
int
@@ -198,21 +225,21 @@
npins = gpio_npins(mask);
if (npins > sc->sc_npins)
- return (1);
+ return 1;
for (npins = 0, i = 0; i < 32; i++)
if (mask & (1 << i)) {
pin = offset + i;
if (pin < 0 || pin >= sc->sc_npins)
- return (1);
+ return 1;
if (sc->sc_pins[pin].pin_mapped)
- return (1);
+ return 1;
sc->sc_pins[pin].pin_mapped = 1;
map->pm_map[npins++] = pin;
}
map->pm_size = npins;
- return (0);
+ return 0;
}
void
@@ -232,7 +259,7 @@
{
struct gpio_softc *sc = gpio;
- return (gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]));
+ return gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]);
}
void
@@ -249,7 +276,7 @@
{
struct gpio_softc *sc = gpio;
- return (gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags));
+ return gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags);
}
int
@@ -257,7 +284,7 @@
{
struct gpio_softc *sc = gpio;
- return (sc->sc_pins[map->pm_map[pin]].pin_caps);
+ return sc->sc_pins[map->pm_map[pin]].pin_caps;
}
int
@@ -269,7 +296,7 @@
if (mask & (1 << i))
npins++;
- return (npins);
+ return npins;
}
int
@@ -281,17 +308,22 @@
sc = device_lookup_private(&gpio_cd, minor(dev));
if (sc == NULL)
- return (ENXIO);
-
- if (sc->sc_opened)
- return (EBUSY);
+ return ENXIO;
+ DPRINTF(("%s: opening\n", sc->sc_dev->dv_xname));
+ if (sc->sc_opened) {
+ DPRINTF(("%s: already opened\n", sc->sc_dev->dv_xname));
+ return EBUSY;
+ }
- if ((ret = gpiobus_open(sc->sc_gc, sc->sc_dev)))
+ if ((ret = gpiobus_open(sc->sc_gc, sc->sc_dev))) {
+ DPRINTF(("%s: gpiobus_open returned %d\n", sc->sc_dev->dv_xname,
+ ret));
return ret;
+ }
sc->sc_opened = 1;
- return (0);
+ return 0;
}
int
@@ -301,10 +333,22 @@
struct gpio_softc *sc;
sc = device_lookup_private(&gpio_cd, minor(dev));
+ DPRINTF(("%s: closing\n", sc->sc_dev->dv_xname));
gpiobus_close(sc->sc_gc, sc->sc_dev);
sc->sc_opened = 0;
- return (0);
+ return 0;
+}
+
+int
+gpio_pinbyname(struct gpio_softc *sc, char *gp_name)
+{
+ struct gpio_name *nm;
+
+ LIST_FOREACH(nm, &sc->sc_names, gp_next)
+ if (!strcmp(nm->gp_name, gp_name))
+ return nm->gp_pin;
+ return -1;
}
int
@@ -314,44 +358,311 @@
struct gpio_softc *sc;
gpio_chipset_tag_t gc;
struct gpio_info *info;
- struct gpio_pin_op *op;
- struct gpio_pin_ctl *ctl;
- int pin, value, flags;
+ struct gpio_attach *attach;
+ struct gpio_attach_args ga;
+ struct gpio_dev *gdev;
+ struct gpio_req *req;
+ struct gpio_name *nm;
+ struct gpio_set *set;
+ struct device *dv;
+ kauth_cred_t cred;
+ int locs[GPIOCF_NLOCS];
+ int pin, value, flags, npins, found;
sc = device_lookup_private(&gpio_cd, minor(dev));
gc = sc->sc_gc;
- if (cmd != GPIOINFO && !device_is_active(sc->sc_dev))
+ if (cmd != GPIOINFO && !device_is_active(sc->sc_dev)) {
+ DPRINTF(("%s: device is not active\n", sc->sc_dev->dv_xname));
return EBUSY;
+ }
+
+ cred = kauth_cred_get();
switch (cmd) {
case GPIOINFO:
info = (struct gpio_info *)data;
+ if (!kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ info->gpio_npins = sc->sc_npins;
+ else {
+ for (pin = npins = 0; pin < sc->sc_npins; pin++)
+ if (sc->sc_pins[pin].pin_flags & GPIO_PIN_SET)
+ ++npins;
+ info->gpio_npins = npins;
+ }
+ break;
+ case GPIOREAD:
+ req = (struct gpio_req *)data;
+
+ if (req->gp_name[0] != '\0') {
+ pin = gpio_pinbyname(sc, req->gp_name);
+ if (pin == -1)
+ return EINVAL;
+ } else
+ pin = req->gp_pin;
+
+ if (pin < 0 || pin >= sc->sc_npins)
+ return EINVAL;
+
+ if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
+ kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
+
+ /* return read value */
+ req->gp_value = gpiobus_pin_read(gc, pin);
+ break;
+ case GPIOWRITE:
+ if ((flag & FWRITE) == 0)
+ return EBADF;
+
+ req = (struct gpio_req *)data;
+
+ if (req->gp_name[0] != '\0') {
+ pin = gpio_pinbyname(sc, req->gp_name);
+ if (pin == -1)
+ return EINVAL;
+ } else
+ pin = req->gp_pin;
+
+ if (pin < 0 || pin >= sc->sc_npins)
+ return EINVAL;
+
+ if (sc->sc_pins[pin].pin_mapped)
+ return EBUSY;
+
+ if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
+ kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
- info->gpio_npins = sc->sc_npins;
+ value = req->gp_value;
+ if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH)
+ return EINVAL;
+
+ gpiobus_pin_write(gc, pin, value);
+ /* return old value */
+ req->gp_value = sc->sc_pins[pin].pin_state;
+ /* update current value */
+ sc->sc_pins[pin].pin_state = value;
break;
+ case GPIOTOGGLE:
+ if ((flag & FWRITE) == 0)
+ return EBADF;
+
+ req = (struct gpio_req *)data;
+
+ if (req->gp_name[0] != '\0') {
+ pin = gpio_pinbyname(sc, req->gp_name);
+ if (pin == -1)
+ return EINVAL;
+ } else
+ pin = req->gp_pin;
+
+ if (pin < 0 || pin >= sc->sc_npins)
+ return EINVAL;
+
+ if (sc->sc_pins[pin].pin_mapped)
+ return EBUSY;
+
+ if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
+ kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
+
+ value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ?
+ GPIO_PIN_HIGH : GPIO_PIN_LOW);
+ gpiobus_pin_write(gc, pin, value);
+ /* return old value */
+ req->gp_value = sc->sc_pins[pin].pin_state;
+ /* update current value */
+ sc->sc_pins[pin].pin_state = value;
+ break;
+ case GPIOATTACH:
+ if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
+
+ attach = (struct gpio_attach *)data;
+ ga.ga_gpio = sc;
+ ga.ga_dvname = attach->ga_dvname;
+ ga.ga_offset = attach->ga_offset;
+ ga.ga_mask = attach->ga_mask;
+ DPRINTF(("%s: attach %s with offset %d and mask 0x%02x\n",
+ sc->sc_dev->dv_xname, ga.ga_dvname, ga.ga_offset,
+ ga.ga_mask));
+
+ locs[GPIOCF_OFFSET] = ga.ga_offset;
+ locs[GPIOCF_MASK] = ga.ga_mask;
+
+ dv = config_found_sm_loc(sc->sc_dev, "gpio", locs, &ga,
+ gpiobus_print, gpio_submatch);
+ if (dv != NULL) {
+ gdev = kmem_alloc(sizeof(struct gpio_dev), KM_SLEEP);
+ gdev->sc_dev = dv;
+ LIST_INSERT_HEAD(&sc->sc_devs, gdev, sc_next);
+ } else
+ return EINVAL;
+ break;
+ case GPIODETACH:
+ if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
+
+ attach = (struct gpio_attach *)data;
+ LIST_FOREACH(gdev, &sc->sc_devs, sc_next) {
+ if (strcmp(gdev->sc_dev->dv_xname, attach->ga_dvname)
+ == 0) {
+ if (config_detach(gdev->sc_dev, 0) == 0) {
+ LIST_REMOVE(gdev, sc_next);
+ kmem_free(gdev,
+ sizeof(struct gpio_dev));
+ return 0;
+ }
+ break;
+ }
+ }
+ return EINVAL;
+ break;
+ case GPIOSET:
+ if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
+
+ set = (struct gpio_set *)data;
+
+ if (set->gp_name[0] != '\0') {
+ pin = gpio_pinbyname(sc, set->gp_name);
+ if (pin == -1)
+ return EINVAL;
+ } else
+ pin = set->gp_pin;
+ if (pin < 0 || pin >= sc->sc_npins)
+ return EINVAL;
+ flags = set->gp_flags;
+
+ /* check that the controller supports all requested flags */
+ if ((flags & sc->sc_pins[pin].pin_caps) != flags)
+ return ENODEV;
+ flags = set->gp_flags | GPIO_PIN_SET;
+
+ set->gp_caps = sc->sc_pins[pin].pin_caps;
+ /* return old value */
+ set->gp_flags = sc->sc_pins[pin].pin_flags;
+ if (flags > 0) {
+ gpiobus_pin_ctl(gc, pin, flags);
+ /* update current value */
+ sc->sc_pins[pin].pin_flags = flags;
+ }
+
+ /* rename pin or new pin? */
+ if (set->gp_name2[0] != '\0') {
+ found = 0;
+ LIST_FOREACH(nm, &sc->sc_names, gp_next)
+ if (nm->gp_pin == pin) {
+ strlcpy(nm->gp_name, set->gp_name2,
+ sizeof(nm->gp_name));
+ found = 1;
+ break;
+ }
+ if (!found) {
+ nm = kmem_alloc(sizeof(struct gpio_name),
+ KM_SLEEP);
+ strlcpy(nm->gp_name, set->gp_name2,
+ sizeof(nm->gp_name));
+ nm->gp_pin = set->gp_pin;
+ LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next);
+ }
+ }
+ break;
+ case GPIOUNSET:
+ if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
+
+ set = (struct gpio_set *)data;
+ if (set->gp_name[0] != '\0') {
+ pin = gpio_pinbyname(sc, set->gp_name);
+ if (pin == -1)
+ return EINVAL;
+ } else
+ pin = set->gp_pin;
+
+ if (pin < 0 || pin >= sc->sc_npins)
+ return EINVAL;
+ if (sc->sc_pins[pin].pin_mapped)
+ return EBUSY;
+ if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET))
+ return EINVAL;
+
+ LIST_FOREACH(nm, &sc->sc_names, gp_next) {
+ if (nm->gp_pin == pin) {
+ LIST_REMOVE(nm, gp_next);
+ kmem_free(nm, sizeof(struct gpio_name));
+ break;
+ }
+ }
+ sc->sc_pins[pin].pin_flags &= ~GPIO_PIN_SET;
+ break;
+ default:
+ /* Try the old API */
+ DPRINTF(("%s: trying the old API\n", sc->sc_dev->dv_xname));
+ return gpio_ioctl_oapi(sc, cmd, data, flag, cred);
+ }
+ return 0;
+}
+
+int
+gpio_ioctl_oapi(struct gpio_softc *sc, u_long cmd, void *data, int flag,
+ kauth_cred_t cred)
+{
+ gpio_chipset_tag_t gc;
+ struct gpio_pin_op *op;
+ struct gpio_pin_ctl *ctl;
+ int pin, value, flags;
+
+ gc = sc->sc_gc;
+
+ switch (cmd) {
case GPIOPINREAD:
op = (struct gpio_pin_op *)data;
pin = op->gp_pin;
+
if (pin < 0 || pin >= sc->sc_npins)
- return (EINVAL);
+ return EINVAL;
+
+ if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
+ kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
/* return read value */
op->gp_value = gpiobus_pin_read(gc, pin);
break;
case GPIOPINWRITE:
+ if ((flag & FWRITE) == 0)
+ return EBADF;
+
op = (struct gpio_pin_op *)data;
pin = op->gp_pin;
+
if (pin < 0 || pin >= sc->sc_npins)
- return (EINVAL);
+ return EINVAL;
+
if (sc->sc_pins[pin].pin_mapped)
- return (EBUSY);
+ return EBUSY;
+
+ if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
+ kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
value = op->gp_value;
if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH)
- return (EINVAL);
+ return EINVAL;
gpiobus_pin_write(gc, pin, value);
/* return old value */
@@ -360,13 +671,23 @@
sc->sc_pins[pin].pin_state = value;
break;
case GPIOPINTOGGLE:
+ if ((flag & FWRITE) == 0)
+ return EBADF;
+
op = (struct gpio_pin_op *)data;
pin = op->gp_pin;
+
if (pin < 0 || pin >= sc->sc_npins)
- return (EINVAL);
+ return EINVAL;
+
if (sc->sc_pins[pin].pin_mapped)
- return (EBUSY);
+ return EBUSY;
+
+ if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
+ kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ?
GPIO_PIN_HIGH : GPIO_PIN_LOW);
@@ -377,18 +698,23 @@
sc->sc_pins[pin].pin_state = value;
break;
case GPIOPINCTL:
- ctl = (struct gpio_pin_ctl *)data;
+ ctl = (struct gpio_pin_ctl *) data;
+
+ if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
+ NULL, NULL, NULL, NULL))
+ return EPERM;
pin = ctl->gp_pin;
+
if (pin < 0 || pin >= sc->sc_npins)
- return (EINVAL);
+ return EINVAL;
if (sc->sc_pins[pin].pin_mapped)
- return (EBUSY);
-
+ return EBUSY;
flags = ctl->gp_flags;
+
/* check that the controller supports all requested flags */
if ((flags & sc->sc_pins[pin].pin_caps) != flags)
- return (ENODEV);
+ return ENODEV;
ctl->gp_caps = sc->sc_pins[pin].pin_caps;
/* return old value */
@@ -400,8 +726,7 @@
}
break;
default:
- return (ENOTTY);
+ return ENOTTY;
}
-
- return (0);
+ return 0;
}
Index: src/sys/dev/gpio/gpioow.c
diff -u src/sys/dev/gpio/gpioow.c:1.6 src/sys/dev/gpio/gpioow.c:1.7
--- src/sys/dev/gpio/gpioow.c:1.6 Wed Mar 18 16:00:17 2009
+++ src/sys/dev/gpio/gpioow.c Sat Jul 25 16:17:10 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: gpioow.c,v 1.6 2009/03/18 16:00:17 cegger Exp $ */
+/* $NetBSD: gpioow.c,v 1.7 2009/07/25 16:17:10 mbalmer Exp $ */
/* $OpenBSD: gpioow.c,v 1.1 2006/03/04 16:27:03 grange Exp $ */
/*
@@ -18,7 +18,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gpioow.c,v 1.6 2009/03/18 16:00:17 cegger Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gpioow.c,v 1.7 2009/07/25 16:17:10 mbalmer Exp $");
/*
* 1-Wire bus bit-banging through GPIO pin.
@@ -77,7 +77,12 @@
gpioow_match(device_t parent, cfdata_t cf,
void *aux)
{
- return 1;
+ struct gpio_attach_args *ga = aux;
+
+ if (ga->ga_offset == -1)
+ return 0;
+
+ return strcmp(ga->ga_dvname, cf->cf_name) == 0;
}
void
@@ -90,7 +95,7 @@
/* Check that we have enough pins */
if (gpio_npins(ga->ga_mask) != GPIOOW_NPINS) {
- printf(": invalid pin mask\n");
+ printf(": invalid pin mask 0x%02x\n", ga->ga_mask);
return;
}
@@ -151,10 +156,12 @@
struct gpioow_softc *sc = device_private(self);
int rv = 0;
+ gpio_pin_unmap(sc->sc_gpio, &sc->sc_map);
+
if (sc->sc_ow_dev != NULL)
rv = config_detach(sc->sc_ow_dev, flags);
- return (rv);
+ return rv;
}
int
Index: src/sys/dev/gpio/gpiovar.h
diff -u src/sys/dev/gpio/gpiovar.h:1.7 src/sys/dev/gpio/gpiovar.h:1.8
--- src/sys/dev/gpio/gpiovar.h:1.7 Tue Jun 24 10:05:01 2008
+++ src/sys/dev/gpio/gpiovar.h Sat Jul 25 16:17:10 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: gpiovar.h,v 1.7 2008/06/24 10:05:01 gmcgarry Exp $ */
+/* $NetBSD: gpiovar.h,v 1.8 2009/07/25 16:17:10 mbalmer Exp $ */
/* $OpenBSD: gpiovar.h,v 1.3 2006/01/14 12:33:49 grange Exp $ */
/*
@@ -68,6 +68,7 @@
void * ga_gpio;
int ga_offset;
u_int32_t ga_mask;
+ char *ga_dvname;
};
/* GPIO pin map */
@@ -76,6 +77,17 @@
int pm_size; /* map size */
};
+struct gpio_dev {
+ struct device *sc_dev; /* the gpio device */
+ LIST_ENTRY(gpio_dev) sc_next;
+};
+
+struct gpio_name {
+ char gp_name[GPIOMAXNAME];
+ int gp_pin;
+ LIST_ENTRY(gpio_name) gp_next;
+};
+
int gpio_pin_map(void *, int, u_int32_t, struct gpio_pinmap *);
void gpio_pin_unmap(void *, struct gpio_pinmap *);
int gpio_pin_read(void *, struct gpio_pinmap *, int);
Index: src/sys/sys/gpio.h
diff -u src/sys/sys/gpio.h:1.3 src/sys/sys/gpio.h:1.4
--- src/sys/sys/gpio.h:1.3 Wed Jan 9 15:11:30 2008
+++ src/sys/sys/gpio.h Sat Jul 25 16:17:10 2009
@@ -1,5 +1,5 @@
-/* $NetBSD: gpio.h,v 1.3 2008/01/09 15:11:30 xtraeme Exp $ */
-/* $OpenBSD: gpio.h,v 1.1 2004/06/03 18:08:00 grange Exp $ */
+/* $NetBSD */
+/* $OpenBSD: gpio.h,v 1.7 2008/11/26 14:51:20 mbalmer Exp $ */
/*
* Copyright (c) 2004 Alexander Yurchenko <gra...@openbsd.org>
*
@@ -23,6 +23,9 @@
#define GPIO_PIN_LOW 0x00 /* low level (logical 0) */
#define GPIO_PIN_HIGH 0x01 /* high level (logical 1) */
+/* Max name length of a pin */
+#define GPIOMAXNAME 64
+
/* GPIO pin configuration flags */
#define GPIO_PIN_INPUT 0x0001 /* input direction */
#define GPIO_PIN_OUTPUT 0x0002 /* output direction */
@@ -32,31 +35,67 @@
#define GPIO_PIN_TRISTATE 0x0020 /* output disabled */
#define GPIO_PIN_PULLUP 0x0040 /* internal pull-up enabled */
#define GPIO_PIN_PULLDOWN 0x0080 /* internal pull-down enabled */
-#define GPIO_PIN_INVIN 0x0100 /* invert input */
-#define GPIO_PIN_INVOUT 0x0200 /* invert output */
+#define GPIO_PIN_INVIN 0x0100 /* invert input */
+#define GPIO_PIN_INVOUT 0x0200 /* invert output */
+#define GPIO_PIN_USER 0x0400 /* user != 0 can access */
+#define GPIO_PIN_SET 0x8000 /* set for securelevel access */
/* GPIO controller description */
struct gpio_info {
int gpio_npins; /* total number of pins available */
};
-/* GPIO pin operation (read/write/toggle) */
-struct gpio_pin_op {
- int gp_pin; /* pin number */
- int gp_value; /* value */
+/* GPIO pin request (read/write/toggle) */
+struct gpio_req {
+ char gp_name[GPIOMAXNAME]; /* pin name */
+ int gp_pin; /* pin number */
+ int gp_value; /* value */
+};
+
+/* GPIO pin configuration */
+struct gpio_set {
+ char gp_name[GPIOMAXNAME];
+ int gp_pin;
+ int gp_caps;
+ int gp_flags;
+ char gp_name2[GPIOMAXNAME]; /* new name */
+};
+
+/* Attach/detach device drivers that use GPIO pins */
+struct gpio_attach {
+ char ga_dvname[16]; /* device name */
+ int ga_offset; /* pin number */
+ u_int32_t ga_mask; /* binary mask */
};
-/* GPIO pin control */
+/* GPIO pin control (old API) */
struct gpio_pin_ctl {
int gp_pin; /* pin number */
int gp_caps; /* pin capabilities (read-only) */
int gp_flags; /* pin configuration flags */
};
+/* GPIO pin operation (read/write/toggle) (old API) */
+struct gpio_pin_op {
+ int gp_pin; /* pin number */
+ int gp_value; /* value */
+};
+
#define GPIOINFO _IOR('G', 0, struct gpio_info)
+
+/* the old API, kept for backwards compatibility */
#define GPIOPINREAD _IOWR('G', 1, struct gpio_pin_op)
#define GPIOPINWRITE _IOWR('G', 2, struct gpio_pin_op)
#define GPIOPINTOGGLE _IOWR('G', 3, struct gpio_pin_op)
#define GPIOPINCTL _IOWR('G', 4, struct gpio_pin_ctl)
+/* the new API */
+#define GPIOSET _IOWR('G', 5, struct gpio_set)
+#define GPIOUNSET _IOWR('G', 6, struct gpio_set)
+#define GPIOREAD _IOWR('G', 7, struct gpio_req)
+#define GPIOWRITE _IOWR('G', 8, struct gpio_req)
+#define GPIOTOGGLE _IOWR('G', 9, struct gpio_req)
+#define GPIOATTACH _IOWR('G', 10, struct gpio_attach)
+#define GPIODETACH _IOWR('G', 11, struct gpio_attach)
+
#endif /* !_SYS_GPIO_H_ */
Added files:
Index: src/sys/dev/gpio/gpiosim.c
diff -u /dev/null src/sys/dev/gpio/gpiosim.c:1.1
--- /dev/null Sat Jul 25 16:17:10 2009
+++ src/sys/dev/gpio/gpiosim.c Sat Jul 25 16:17:10 2009
@@ -0,0 +1,171 @@
+/* $NetBSD: gpiosim.c,v 1.1 2009/07/25 16:17:10 mbalmer Exp $ */
+/* $OpenBSD: gpiosim.c,v 1.1 2008/11/23 18:46:49 mbalmer Exp $ */
+
+/*
+ * Copyright (c) 2007, 2008, 2009 Marc Balmer <m...@msys.ch>
+ * All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
+ * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/* 32 bit wide GPIO simulator */
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/gpio.h>
+#include <sys/malloc.h>
+#include <sys/sysctl.h>
+#include <sys/ioccom.h>
+
+#include <dev/gpio/gpiovar.h>
+#include <dev/biovar.h>
+
+#define GPIOSIM_NPINS 32
+
+struct gpiosim_softc {
+ struct device sc_dev;
+ u_int32_t sc_state;
+ struct gpio_chipset_tag sc_gpio_gc;
+ gpio_pin_t sc_gpio_pins[GPIOSIM_NPINS];
+};
+
+struct gpiosim_op {
+ void *cookie;
+ u_int32_t mask;
+ u_int32_t state;
+};
+#define GPIOSIMREAD _IOWR('G', 0, struct gpiosim_op)
+#define GPIOSIMWRITE _IOW('G', 1, struct gpiosim_op)
+
+int gpiosim_match(device_t, cfdata_t, void *);
+void gpiosim_attach(device_t, device_t, void *);
+int gpiosim_detach(device_t, int);
+int gpiosim_ioctl(device_t, u_long cmd, void *);
+int gpiosim_activate(device_t, enum devact);
+
+int gpiosim_pin_read(void *, int);
+void gpiosim_pin_write(void *, int, int);
+void gpiosim_pin_ctl(void *, int, int);
+
+CFATTACH_DECL_NEW(gpiosim, sizeof(struct gpiosim_softc), gpiosim_match,
+ gpiosim_attach, gpiosim_detach, gpiosim_activate);
+
+extern struct cfdriver gpiosim_cd;
+
+int
+gpiosim_match(device_t parent, cfdata_t match, void *aux)
+{
+ return 1;
+}
+
+void
+gpiosim_attach(device_t parent, device_t self, void *aux)
+{
+ struct gpiosim_softc *sc = device_private(self);
+ struct gpiobus_attach_args gba;
+ int i;
+
+ /* initialize pin array */
+ for (i = 0; i < GPIOSIM_NPINS; i++) {
+ sc->sc_gpio_pins[i].pin_num = i;
+ sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT |
+ GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN |
+ GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN |
+ GPIO_PIN_INVIN | GPIO_PIN_INVOUT;
+
+ /* read initial state */
+ sc->sc_gpio_pins[i].pin_flags = GPIO_PIN_INPUT;
+ sc->sc_state = 0;
+
+ /* create controller tag */
+ sc->sc_gpio_gc.gp_cookie = sc;
+ sc->sc_gpio_gc.gp_pin_read = gpiosim_pin_read;
+ sc->sc_gpio_gc.gp_pin_write = gpiosim_pin_write;
+ sc->sc_gpio_gc.gp_pin_ctl = gpiosim_pin_ctl;
+
+ /* gba.gba_name = "gpio"; */
+ gba.gba_gc = &sc->sc_gpio_gc;
+ gba.gba_pins = sc->sc_gpio_pins;
+ gba.gba_npins = GPIOSIM_NPINS;
+ }
+ printf("\n");
+ config_found_ia(self, "gpiobus", &gba, gpiobus_print);
+ bio_register(&sc->sc_dev, gpiosim_ioctl);
+}
+
+int
+gpiosim_detach(device_t self, int flags)
+{
+ return 1;
+}
+
+int
+gpiosim_activate(device_t self, enum devact act)
+{
+ switch (act) {
+ case DVACT_ACTIVATE:
+ return EOPNOTSUPP;
+ case DVACT_DEACTIVATE:
+ break;
+ }
+
+ return 0;
+}
+
+int
+gpiosim_ioctl(device_t self, u_long cmd, void * data)
+{
+ struct gpiosim_softc *sc = (void *)self;
+ struct gpiosim_op *op = (void *)data;
+
+ switch (cmd) {
+ case GPIOSIMREAD:
+ op->state = sc->sc_state;
+ break;
+ case GPIOSIMWRITE:
+ sc->sc_state = (sc->sc_state & ~op->mask) |
+ (op->state & op->mask);
+ break;
+ }
+ return 0;
+}
+
+int
+gpiosim_pin_read(void *arg, int pin)
+{
+ struct gpiosim_softc *sc = (struct gpiosim_softc *)arg;
+
+ if (sc->sc_state & (1 << pin))
+ return GPIO_PIN_HIGH;
+ else
+ return GPIO_PIN_LOW;
+}
+
+void
+gpiosim_pin_write(void *arg, int pin, int value)
+{
+ struct gpiosim_softc *sc = (struct gpiosim_softc *)arg;
+
+ if (value == 0)
+ sc->sc_state &= ~(1 << pin);
+ else
+ sc->sc_state |= (1 << pin);
+}
+
+void
+gpiosim_pin_ctl(void *arg, int pin, int flags)
+{
+ struct gpiosim_softc *sc = (struct gpiosim_softc *)arg;
+
+ sc->sc_gpio_pins[pin].pin_flags = flags;
+}
