Module Name: src
Committed By: matt
Date: Fri Aug 21 17:50:35 UTC 2009
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: locore_mips3.S mipsX_subr.S
mips_mcclock_loop.S
Log Message:
Make ABI agnostic. Move locoresw to .rdata
To generate a diff of this commit:
cvs rdiff -u -r1.93.38.2 -r1.93.38.3 src/sys/arch/mips/mips/locore_mips3.S
cvs rdiff -u -r1.26.36.1 -r1.26.36.1.2.1 src/sys/arch/mips/mips/mipsX_subr.S
cvs rdiff -u -r1.3 -r1.3.18.1 src/sys/arch/mips/mips/mips_mcclock_loop.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/locore_mips3.S
diff -u src/sys/arch/mips/mips/locore_mips3.S:1.93.38.2 src/sys/arch/mips/mips/locore_mips3.S:1.93.38.3
--- src/sys/arch/mips/mips/locore_mips3.S:1.93.38.2 Thu Aug 20 22:21:55 2009
+++ src/sys/arch/mips/mips/locore_mips3.S Fri Aug 21 17:50:35 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: locore_mips3.S,v 1.93.38.2 2009/08/20 22:21:55 matt Exp $ */
+/* $NetBSD: locore_mips3.S,v 1.93.38.3 2009/08/21 17:50:35 matt Exp $ */
/*
* Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
@@ -166,7 +166,13 @@
* mips_wait_idle to save power.
*/
LEAF(mips_wait_idle)
- wait
+ mfc0 v0, MIPS_COP_0_STATUS
+ andi v0, v0, MIPS_SR_INT_IE
+ bne v0, zero, 1f
+ nop
+ PANIC("mips_wait_idle: interrupts disabled")
+
+1: wait
nop
nop
nop
Index: src/sys/arch/mips/mips/mipsX_subr.S
diff -u src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1 src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1.2.1
--- src/sys/arch/mips/mips/mipsX_subr.S:1.26.36.1 Tue Jun 9 17:48:20 2009
+++ src/sys/arch/mips/mips/mipsX_subr.S Fri Aug 21 17:50:35 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: mipsX_subr.S,v 1.26.36.1 2009/06/09 17:48:20 snj Exp $ */
+/* $NetBSD: mipsX_subr.S,v 1.26.36.1.2.1 2009/08/21 17:50:35 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -119,6 +119,7 @@
#include "opt_ddb.h"
#include "opt_kgdb.h"
#include "opt_mips3_wired.h"
+#include "opt_vmswap.h"
#include <sys/cdefs.h>
@@ -308,18 +309,18 @@
mfc0 k0, MIPS_COP_0_BAD_VADDR #00: k0=bad address
lui k1, %hi(segbase) #01: k1=hi of segbase
bltz k0, 4f #02: k0<0 -> 4f (kernel fault)
- srl k0, 20 #03: k0=seg offset (almost)
- lw k1, %lo(segbase)(k1) #04: k1=segment tab base
- andi k0, k0, 0xffc #05: k0=seg offset (mask 0x3)
- addu k1, k0, k1 #06: k1=seg entry address
- lw k1, 0(k1) #07: k1=seg entry
+ srl k0, (2*PGSHIFT-2-PTR_SCALESHIFT)#03: k0=seg offset (almost)
+ PTR_L k1, %lo(segbase)(k1) #04: k1=segment tab base
+ andi k0, k0, (NBPG-(1<<PTR_SCALESHIFT))#05: k0=seg offset (mask 0x3)
+ PTR_ADDU k1, k0, k1 #06: k1=seg entry address
+ PTR_L k1, 0(k1) #07: k1=seg entry
mfc0 k0, MIPS_COP_0_BAD_VADDR #08: k0=bad address (again)
beq k1, zero, 5f #09: ==0 -- no page table
- srl k0, 10 #0a: k0=VPN (aka va>>10)
- andi k0, k0, 0xff8 #0b: k0=page tab offset
- addu k1, k1, k0 #0c: k1=pte address
- lw k0, 0(k1) #0d: k0=lo0 pte
- lw k1, 4(k1) #0e: k1=lo1 pte
+ srl k0, (PGSHIFT-2) #0a: k0=VPN (aka va>>10)
+ andi k0, k0, (NBPG-8) #0b: k0=page tab offset
+ PTR_ADDU k1, k1, k0 #0c: k1=pte address
+ INT_L k0, 0(k1) #0d: k0=lo0 pte
+ INT_L k1, 4(k1) #0e: k1=lo1 pte
sll k0, 2 #0f: chop top 2 bits (part 1a)
srl k0, 2 #10: chop top 2 bits (part 1b)
#ifdef MIPS3_5900
@@ -370,18 +371,18 @@
dmfc0 k0, MIPS_COP_0_BAD_VADDR #00: k0=bad address
lui k1, %hi(segbase) #01: k1=hi of segbase
bltz k0, 4f #02: k0<0 -> 4f (kernel fault)
- srl k0, 20 #03: k0=seg offset (almost)
- lw k1, %lo(segbase)(k1) #04: k1=segment tab base
- andi k0, k0, 0xffc #05: k0=seg offset (mask 0x3)
- addu k1, k0, k1 #06: k1=seg entry address
- lw k1, 0(k1) #07: k1=seg entry
+ srl k0, 2*PGSHIFT-2-PTR_SCALESHIFT #03: k0=seg offset (almost)
+ PTR_L k1, %lo(segbase)(k1) #04: k1=segment tab base
+ andi k0, NBPG-(1<<PTR_SCALESHIFT) #05: k0=seg offset (mask 0x3)
+ PTR_ADDU k1, k0, k1 #06: k1=seg entry address
+ PTR_L k1, 0(k1) #07: k1=seg entry
dmfc0 k0, MIPS_COP_0_BAD_VADDR #08: k0=bad address (again)
beq k1, zero, 5f #09: ==0 -- no page table
- srl k0, 10 #0a: k0=VPN (aka va>>10)
- andi k0, k0, 0xff8 #0b: k0=page tab offset
- addu k1, k1, k0 #0c: k1=pte address
- lw k0, 0(k1) #0d: k0=lo0 pte
- lw k1, 4(k1) #0e: k1=lo1 pte
+ srl k0, (PGSHIFT-2) #0a: k0=VPN (aka va>>10)
+ andi k0, k0, (NBPG-8) #0b: k0=page tab offset
+ PTR_ADDU k1, k1, k0 #0c: k1=pte address
+ INT_L k0, 0(k1) #0d: k0=lo0 pte
+ INT_L k1, 4(k1) #0e: k1=lo1 pte
sll k0, 2 #0f: chop top 2 bits (part 1a)
srl k0, 2 #10: chop top 2 bits (part 1b)
mtc0 k0, MIPS_COP_0_TLB_LO0 #11: lo0 is loaded
@@ -407,7 +408,7 @@
* Vector to real handler in KSEG1.
*/
VECTOR(MIPSX(cache), unknown)
- la k0, _C_LABEL(MIPSX(cacheException))
+ PTR_LA k0, _C_LABEL(MIPSX(cacheException))
li k1, MIPS_PHYS_MASK
and k0, k1
li k1, MIPS_KSEG1_START
@@ -420,7 +421,7 @@
* Handle MIPS32/MIPS64 style interrupt exception vector.
*/
VECTOR(MIPSX(intr), unknown)
- la k0, MIPSX(KernIntr)
+ PTR_LA k0, MIPSX(KernIntr)
j k0
nop
_VECTOR_END(MIPSX(intr))
@@ -452,13 +453,13 @@
and k1, k1, MIPS3_CR_EXC_CODE #04: mask out the cause bits.
or k1, k1, k0 #05: change index to user table
1:
- la k0, MIPSX(excpt_sw) #06: get base of the jump table
+ PTR_LA k0, MIPSX(excpt_sw) #06: get base of the jump table
addu k0, k0, k1 #07: get the address of the
# function entry. Note that
# the cause is already
# shifted left by 2 bits so
# we dont have to shift.
- lw k0, 0(k0) #08: get the function address
+ PTR_L k0, 0(k0) #08: get the function address
#nop # -slip-
j k0 #09: jump to the function
@@ -520,7 +521,7 @@
.set noat
.mask 0x80000000, -4
#if defined(DDB) || defined(KGDB)
- la k0, _C_LABEL(kdbaux)
+ PTR_LA k0, _C_LABEL(kdbaux)
REG_S s0, SF_REG_S0(k0)
REG_S s1, SF_REG_S1(k0)
REG_S s2, SF_REG_S2(k0)
@@ -538,7 +539,7 @@
* We don't need to save s0 - s8, sp and gp because
* the compiler does it for us.
*/
- subu sp, sp, KERNFRAME_SIZ
+ PTR_SUBU sp, sp, KERNFRAME_SIZ
REG_S AT, TF_BASE+TF_REG_AST(sp)
REG_S v0, TF_BASE+TF_REG_V0(sp)
REG_S v1, TF_BASE+TF_REG_V1(sp)
@@ -558,21 +559,26 @@
REG_S ta1, TF_BASE+TF_REG_TA1(sp)
REG_S ta2, TF_BASE+TF_REG_TA2(sp)
REG_S ta3, TF_BASE+TF_REG_TA3(sp)
- mfc0 a2, MIPS_COP_0_BAD_VADDR # 3rd arg is fault address
+ _MFC0 a2, MIPS_COP_0_BAD_VADDR # 3rd arg is fault address
REG_S t8, TF_BASE+TF_REG_T8(sp)
REG_S t9, TF_BASE+TF_REG_T9(sp)
REG_S ra, TF_BASE+TF_REG_RA(sp)
REG_S a0, TF_BASE+TF_REG_SR(sp)
- mfc0 a3, MIPS_COP_0_EXC_PC # 4th arg is exception PC
+ _MFC0 a3, MIPS_COP_0_EXC_PC # 4th arg is exception PC
REG_S v0, TF_BASE+TF_REG_MULLO(sp)
REG_S v1, TF_BASE+TF_REG_MULHI(sp)
REG_S a3, TF_BASE+TF_REG_EPC(sp)
- addu v0, sp, TF_BASE
- sw v0, KERNFRAME_ARG5(sp) # 5th arg is p. to trapframe
+#if defined(__mips_o32) || defined(__mips_o64)
+ PTR_ADDU v0, sp, TF_BASE
+ REG_S v0, KERNFRAME_ARG5(sp) # 5th arg is p. to trapframe
+#endif
+#if defined(__mips_n32) || defined(__mips_n64)
+ PTR_ADDU a4, sp, TF_BASE # 5th arg is p. to trapframe
+#endif
#ifdef IPL_ICU_MASK
.set at
- lw v0, _C_LABEL(md_imask)
- sw v0, TF_BASE+TF_PPL(sp)
+ INT_L v0, _C_LABEL(md_imask)
+ INT_S v0, TF_BASE+TF_PPL(sp)
nop
.set noat
#endif
@@ -580,8 +586,8 @@
* Call the trap handler.
*/
#if defined(DDB) || defined(DEBUG) || defined(KGDB)
- addu v0, sp, KERNFRAME_SIZ
- sw v0, KERNFRAME_SP(sp)
+ PTR_ADDU v0, sp, KERNFRAME_SIZ
+ REG_S v0, KERNFRAME_SP(sp)
#endif
mtc0 zero, MIPS_COP_0_STATUS # Set kernel no error level
COP0_SYNC
@@ -589,7 +595,7 @@
nop
nop
jal _C_LABEL(trap) #
- sw a3, KERNFRAME_RA(sp) # for debugging
+ REG_S a3, KERNFRAME_RA(sp) # for debugging
/*
* Restore registers and return from the exception.
@@ -601,8 +607,8 @@
nop
#ifdef IPL_ICU_MASK
.set at
- lw a0, TF_BASE+TF_PPL(sp)
- sw a0, _C_LABEL(md_imask)
+ INT_L a0, TF_BASE+TF_PPL(sp)
+ INT_S a0, _C_LABEL(md_imask)
jal _C_LABEL(md_imask_update)
nop
.set noat
@@ -647,9 +653,9 @@
REG_L t8, TF_BASE+TF_REG_T8(sp)
REG_L t9, TF_BASE+TF_REG_T9(sp)
REG_L ra, TF_BASE+TF_REG_RA(sp)
- addu sp, sp, KERNFRAME_SIZ
+ PTR_ADDU sp, sp, KERNFRAME_SIZ
#ifdef DDBnotyet
- la k0, _C_LABEL(kdbaux)
+ PTR_LA k0, _C_LABEL(kdbaux)
REG_L s0, SF_REG_S0(k0)
REG_L s1, SF_REG_S1(k0)
REG_L s2, SF_REG_S2(k0)
@@ -680,9 +686,9 @@
/*
* Save all of the registers except for the kernel temporaries in u_pcb.
*/
- lw k1, CPUVAR(CURLWP)
- lw k1, L_ADDR(k1)
- addu k1, k1, USPACE - FRAME_SIZ
+ PTR_L k1, CPUVAR(CURLWP)
+ PTR_L k1, L_ADDR(k1)
+ PTR_ADDU k1, k1, USPACE - FRAME_SIZ
REG_S AT, FRAME_AST(k1)
REG_S v0, FRAME_V0(k1)
REG_S v1, FRAME_V1(k1)
@@ -724,13 +730,13 @@
REG_S a3, FRAME_EPC(k1)
#ifdef IPL_ICU_MASK
.set at
- lw t0, _C_LABEL(md_imask)
- sw t0, FRAME_PPL(k1)
+ INT_L t0, _C_LABEL(md_imask)
+ INT_S t0, FRAME_PPL(k1)
.set noat
#endif
- addu sp, k1, -CALLFRAME_SIZ # switch to kernel SP
+ PTR_ADDU sp, k1, -CALLFRAME_SIZ # switch to kernel SP
#ifdef __GP_SUPPORT__
- la gp, _C_LABEL(_gp) # switch to kernel GP
+ PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP
#endif
/*
* Turn off fpu and enter kernel mode
@@ -741,22 +747,22 @@
/*
* Call the trap handler.
*/
- lw MIPS_CURLWP, CPUVAR(CURLWP)
+ PTR_L MIPS_CURLWP, CPUVAR(CURLWP)
mtc0 t0, MIPS_COP_0_STATUS
COP0_SYNC
jal _C_LABEL(trap)
- sw a3, CALLFRAME_SIZ-4(sp) # for debugging
+ REG_S a3, CALLFRAME_RA(sp) # for debugging
/*
* Check pending asynchronous traps.
*/
- lw t0, L_MD_ASTPENDING(MIPS_CURLWP)
+ INT_L t0, L_MD_ASTPENDING(MIPS_CURLWP)
beq t0, zero, 1f
nop
/*
* We have pending asynchronous traps; all the state is already saved.
*/
jal _C_LABEL(ast)
- lw a0, CALLFRAME_SIZ + FRAME_EPC(sp)
+ REG_L a0, CALLFRAME_SIZ + FRAME_EPC(sp)
1:
/*
* Restore user registers and return.
@@ -773,14 +779,14 @@
nop # 3 nop delay
nop
nop
- addu a1, sp, CALLFRAME_SIZ
+ PTR_ADDU a1, sp, CALLFRAME_SIZ
#ifdef IPL_ICU_MASK
.set at
- lw t0, FRAME_PPL(a1)
- sw t0, _C_LABEL(md_imask)
+ INT_L t0, FRAME_PPL(a1)
+ INT_S t0, _C_LABEL(md_imask)
jal _C_LABEL(md_imask_update)
nop
- addu a1, sp, CALLFRAME_SIZ
+ PTR_ADDU a1, sp, CALLFRAME_SIZ
.set noat
#endif
# REG_L a0, FRAME_SR(a1)
@@ -841,10 +847,10 @@
NESTED_NOPROFILE(MIPSX(SystemCall), CALLFRAME_SIZ, ra)
.set noat
.mask 0x80000000, -4
- lw k1, CPUVAR(CURLWP)
- lw k1, L_ADDR(k1)
+ PTR_L k1, CPUVAR(CURLWP)
+ PTR_L k1, L_ADDR(k1)
#nop # -slip-
- addu k1, k1, USPACE - FRAME_SIZ
+ PTR_ADDU k1, k1, USPACE - FRAME_SIZ
#REG_S AT, FRAME_AST(k1)
REG_S v0, FRAME_V0(k1) # syscall #
REG_S v1, FRAME_V1(k1) # used by syscall()
@@ -853,7 +859,7 @@
REG_S a1, FRAME_A1(k1)
REG_S a2, FRAME_A2(k1)
REG_S a3, FRAME_A3(k1)
- lw a0, CPUVAR(CURLWP) # 1st arg is curlwp
+ PTR_L a0, CPUVAR(CURLWP) # 1st arg is curlwp
mfhi v1
#REG_S t0, FRAME_T0(k1) # no need to save temp regs
#REG_S t1, FRAME_T1(k1)
@@ -869,7 +875,7 @@
REG_S s1, FRAME_S1(k1)
REG_S s2, FRAME_S2(k1)
REG_S s3, FRAME_S3(k1)
- mfc0 a3, MIPS_COP_0_EXC_PC # 4th arg is PC
+ _MFC0 a3, MIPS_COP_0_EXC_PC # 4th arg is PC
REG_S s4, FRAME_S4(k1)
REG_S s5, FRAME_S5(k1)
REG_S s6, FRAME_S6(k1)
@@ -886,26 +892,26 @@
REG_S a3, FRAME_EPC(k1)
#ifdef IPL_ICU_MASK
.set at
- lw t0, _C_LABEL(md_imask)
- sw t0, FRAME_PPL(k1)
+ INT_L t0, _C_LABEL(md_imask)
+ INT_S t0, FRAME_PPL(k1)
.set noat
#endif
- lw t0, L_PROC(a0) # curlwp->l_proc (used below)
+ PTR_L t0, L_PROC(a0) # curlwp->l_proc (used below)
move MIPS_CURLWP, a0 # set curlwp reg
- addu sp, k1, -CALLFRAME_SIZ
+ PTR_ADDU sp, k1, -CALLFRAME_SIZ
#ifdef __GP_SUPPORT__
- la gp, _C_LABEL(_gp) # switch to kernel GP
+ PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP
#endif
/*
* Turn off fpu and enter kernel mode
*/
.set at
- lw t1, P_MD_SYSCALL(t0) # t1 = syscall
+ PTR_L t1, P_MD_SYSCALL(t0) # t1 = syscall
and t0, a1, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS_SR_KSU_MASK)
.set noat
#if defined(DDB) || defined(DEBUG) || defined(KGDB)
move ra, a3
- sw ra, CALLFRAME_RA(sp)
+ REG_S ra, CALLFRAME_RA(sp)
#endif
/*
* Call the system call handler.
@@ -917,14 +923,14 @@
/*
* Check pending asynchronous traps.
*/
- lw t0, L_MD_ASTPENDING(MIPS_CURLWP)
+ INT_L t0, L_MD_ASTPENDING(MIPS_CURLWP)
beq t0, zero, 1f
nop
/*
* We have pending asynchronous traps; all the state is already saved.
*/
jal _C_LABEL(ast)
- lw a0, CALLFRAME_SIZ + FRAME_EPC(sp)
+ PTR_L a0, CALLFRAME_SIZ + FRAME_EPC(sp)
1:
/*
* Restore user registers and return.
@@ -945,14 +951,14 @@
/*
* Restore user registers and return.
*/
- addu a1, sp, CALLFRAME_SIZ
+ PTR_ADDU a1, sp, CALLFRAME_SIZ
#ifdef IPL_ICU_MASK
.set at
- lw t0, FRAME_PPL(a1)
- sw t0, _C_LABEL(md_imask)
+ INT_L t0, FRAME_PPL(a1)
+ INT_S t0, _C_LABEL(md_imask)
jal _C_LABEL(md_imask_update)
nop
- addu a1, sp, CALLFRAME_SIZ
+ PTR_ADDU a1, sp, CALLFRAME_SIZ
.set noat
#endif
# REG_L a0, FRAME_SR(a1)
@@ -1017,8 +1023,8 @@
eret
nop
#endif
- la k0, panic # return to panic
- la a0, 9f # panicstr
+ PTR_LA k0, panic # return to panic
+ PTR_LA a0, 9f # panicstr
_MFC0 a1, MIPS_COP_0_ERROR_PC
mfc0 a2, MIPS_COP_0_ECC
mfc0 a3, MIPS_COP_0_CACHE_ERR
@@ -1052,7 +1058,7 @@
NESTED_NOPROFILE(MIPSX(KernIntr), KERNFRAME_SIZ, ra)
.set noat
.mask 0x80000000, -4
- subu sp, sp, KERNFRAME_SIZ
+ PTR_SUBU sp, sp, KERNFRAME_SIZ
/*
* Save the relevant kernel registers onto the stack.
* We don't need to save s0 - s8, sp and gp because
@@ -1077,7 +1083,7 @@
REG_S ta1, TF_BASE+TF_REG_TA1(sp)
REG_S ta2, TF_BASE+TF_REG_TA2(sp)
REG_S ta3, TF_BASE+TF_REG_TA3(sp)
- mfc0 a2, MIPS_COP_0_EXC_PC # 3rd arg is exception PC
+ _MFC0 a2, MIPS_COP_0_EXC_PC # 3rd arg is exception PC
REG_S t8, TF_BASE+TF_REG_T8(sp)
REG_S t9, TF_BASE+TF_REG_T9(sp)
REG_S ra, TF_BASE+TF_REG_RA(sp)
@@ -1085,23 +1091,23 @@
REG_S v0, TF_BASE+TF_REG_MULLO(sp)
REG_S v1, TF_BASE+TF_REG_MULHI(sp)
REG_S a2, TF_BASE+TF_REG_EPC(sp)
- REG_S MIPS_CURLWP, TF_BASE+TF_PAD(sp) # XXX Atheros HAL
+ REG_S MIPS_CURLWP, TF_BASE+TF_PAD(sp) # XXX Atheros HAL
/*
* Call the interrupt handler.
*/
#if defined(DDB) || defined(DEBUG) || defined(KGDB)
move ra, a2
- sw ra, KERNFRAME_RA(sp) # for debugging
+ REG_S ra, KERNFRAME_RA(sp) # for debugging
#endif
#ifdef IPL_ICU_MASK
.set at
- lw t0, _C_LABEL(md_imask)
- sw t0, TF_BASE+TF_PPL(sp)
+ INT_L t0, _C_LABEL(md_imask)
+ INT_S t0, TF_BASE+TF_PPL(sp)
.set noat
#endif
mtc0 zero, MIPS_COP_0_STATUS # Reset exl, trap possible.
COP0_SYNC
- lw MIPS_CURLWP, CPUVAR(CURLWP) # XXX Atheros HAL
+ PTR_L MIPS_CURLWP, CPUVAR(CURLWP) # XXX Atheros HAL
jal _C_LABEL(cpu_intr)
and a3, a0, a1 # 4th is STATUS & CAUSE
/*
@@ -1114,8 +1120,8 @@
nop
#ifdef IPL_ICU_MASK
.set at
- lw a0, TF_BASE+TF_PPL(sp)
- sw a0, _C_LABEL(md_imask)
+ INT_L a0, TF_BASE+TF_PPL(sp)
+ INT_S a0, _C_LABEL(md_imask)
jal _C_LABEL(md_imask_update)
nop
.set noat
@@ -1165,7 +1171,7 @@
REG_L t8, TF_BASE+TF_REG_T8(sp)
REG_L t9, TF_BASE+TF_REG_T9(sp)
REG_L ra, TF_BASE+TF_REG_RA(sp)
- addu sp, sp, KERNFRAME_SIZ # restore kernel SP
+ PTR_ADDU sp, sp, KERNFRAME_SIZ # restore kernel SP
eret # return to interrupted point
.set at
END(MIPSX(KernIntr))
@@ -1196,9 +1202,9 @@
* Save the relevant user registers into the u_pcb.
* We don't need to save s0 - s8 because the compiler does it for us.
*/
- lw k1, CPUVAR(CURLWP)
- lw k1, L_ADDR(k1)
- addu k1, k1, USPACE - FRAME_SIZ
+ PTR_L k1, CPUVAR(CURLWP)
+ PTR_L k1, L_ADDR(k1)
+ PTR_ADDU k1, k1, USPACE - FRAME_SIZ
REG_S AT, FRAME_AST(k1)
REG_S v0, FRAME_V0(k1)
REG_S v1, FRAME_V1(k1)
@@ -1222,7 +1228,7 @@
REG_S t9, FRAME_T9(k1)
REG_S gp, FRAME_GP(k1)
REG_S sp, FRAME_SP(k1)
- mfc0 a2, MIPS_COP_0_EXC_PC # 3rd arg is PC
+ _MFC0 a2, MIPS_COP_0_EXC_PC # 3rd arg is PC
REG_S ra, FRAME_RA(k1)
REG_S a0, FRAME_SR(k1)
REG_S v0, FRAME_MULLO(k1)
@@ -1230,16 +1236,16 @@
REG_S a2, FRAME_EPC(k1)
#ifdef IPL_ICU_MASK
.set at
- lw t0, _C_LABEL(md_imask)
- sw t0, FRAME_PPL(k1)
+ INT_L t0, _C_LABEL(md_imask)
+ INT_S t0, FRAME_PPL(k1)
.set noat
#endif
- addu sp, k1, -CALLFRAME_SIZ # switch to kernel SP
+ PTR_ADDU sp, k1, -CALLFRAME_SIZ # switch to kernel SP
#ifdef __GP_SUPPORT__
- la gp, _C_LABEL(_gp) # switch to kernel GP
+ PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP
#endif
- sw MIPS_CURLWP, MIPS_CURLWP_FRAME(k1)# save curlwp reg
- lw MIPS_CURLWP, CPUVAR(CURLWP) # set curlwp reg
+ PTR_S MIPS_CURLWP, MIPS_CURLWP_FRAME(k1)# save curlwp reg
+ PTR_L MIPS_CURLWP, CPUVAR(CURLWP) # set curlwp reg
/*
* Turn off fpu and enter kernel mode
*/
@@ -1248,7 +1254,7 @@
.set noat
#if defined(DDB) || defined(DEBUG) || defined(KGDB)
move ra, a2
- sw ra, CALLFRAME_RA(sp)
+ REG_S ra, CALLFRAME_RA(sp)
#endif
/*
* Call the interrupt handler.
@@ -1272,16 +1278,16 @@
nop # 3 nop hazard
nop
nop
- addu a1, sp, CALLFRAME_SIZ
+ PTR_ADDU a1, sp, CALLFRAME_SIZ
# REG_L a0, FRAME_SR(a1)
- lw v0, L_MD_ASTPENDING(MIPS_CURLWP)# any pending ast?
+ INT_L v0, L_MD_ASTPENDING(MIPS_CURLWP)# any pending ast?
# mtc0 a0, MIPS_COP_0_STATUS # restore the SR, disable intrs
nop
/*
* Check pending asynchronous traps.
*/
beq v0, zero, 1f # if no, skip ast processing
- lw MIPS_CURLWP, MIPS_CURLWP_FRAME(a1)# restore curlwp reg
+ PTR_L MIPS_CURLWP, MIPS_CURLWP_FRAME(a1)# restore curlwp reg
/*
* We have pending asynchronous traps; save remaining user state in u_pcb.
*/
@@ -1295,7 +1301,7 @@
REG_S s7, FRAME_S7(a1)
REG_S s8, FRAME_S8(a1)
REG_L a0, FRAME_EPC(a1) # argument is interrupted PC
- lw MIPS_CURLWP, CPUVAR(CURLWP) # set curlwp reg
+ PTR_L MIPS_CURLWP, CPUVAR(CURLWP) # set curlwp reg
#ifdef IPL_ICU_MASK
jal _C_LABEL(spllowersofthigh);
nop
@@ -1322,7 +1328,7 @@
nop
nop
- addu a1, sp, CALLFRAME_SIZ
+ PTR_ADDU a1, sp, CALLFRAME_SIZ
# REG_L a0, FRAME_SR(a1)
REG_L s0, FRAME_S0(a1)
REG_L s1, FRAME_S1(a1)
@@ -1349,8 +1355,8 @@
move k1, a1
#ifdef IPL_ICU_MASK
.set at
- lw t0, FRAME_PPL(k1)
- sw t0, _C_LABEL(md_imask)
+ INT_L t0, FRAME_PPL(k1)
+ INT_S t0, _C_LABEL(md_imask)
jal _C_LABEL(md_imask_update)
nop
.set noat
@@ -1424,12 +1430,12 @@
li k1, VM_MIN_KERNEL_ADDRESS # compute index
bgez k0, _C_LABEL(MIPSX(KernGenException)) # full trap processing
subu k0, k0, k1
- lw k1, _C_LABEL(Sysmapsize) # index within range?
+ INT_L k1, _C_LABEL(Sysmapsize) # index within range?
srl k0, k0, PGSHIFT
sltu k1, k0, k1
beq k1, zero, outofworld # No. Failing beyond. . .
nop # - delay slot -
- lw k1, _C_LABEL(Sysmap)
+ PTR_L k1, _C_LABEL(Sysmap)
sll k0, k0, 2 # compute offset from index
addu k1, k1, k0
@@ -1443,7 +1449,7 @@
mfc0 k0, MIPS_COP_0_TLB_INDEX
nop
bltz k0, outofworld # ASSERT(TLB entry exists)
- lw k0, 0(k1) # get PTE entry
+ INT_L k0, 0(k1) # get PTE entry
_SLL k0, k0, WIRED_SHIFT # get rid of "wired" bit
_SRL k0, k0, WIRED_SHIFT
@@ -1452,7 +1458,7 @@
and k0, k0, MIPS3_PG_V # check for valid entry
nop # required for QED5230
beq k0, zero, _C_LABEL(MIPSX(KernGenException)) # PTE invalid
- lw k0, 4(k1) # get odd PTE entry
+ INT_L k0, 4(k1) # get odd PTE entry
_SLL k0, k0, WIRED_SHIFT
mfc0 k1, MIPS_COP_0_TLB_INDEX
_SRL k0, k0, WIRED_SHIFT
@@ -1475,7 +1481,7 @@
mfc0 k0, MIPS_COP_0_TLB_INDEX
nop
bltz k0, outofworld # assert(TLB Entry exists)
- lw k0, 0(k1) # get PTE entry
+ INT_L k0, 0(k1) # get PTE entry
_SLL k0, k0, WIRED_SHIFT # get rid of wired bit
_SRL k0, k0, WIRED_SHIFT
@@ -1484,7 +1490,7 @@
and k0, k0, MIPS3_PG_V # check for valid entry
nop # required for QED5230
beq k0, zero, _C_LABEL(MIPSX(KernGenException)) # PTE invalid
- lw k0, -4(k1) # get even PTE entry
+ INT_L k0, -4(k1) # get even PTE entry
_SLL k0, k0, WIRED_SHIFT
mfc0 k1, MIPS_COP_0_TLB_INDEX
_SRL k0, k0, WIRED_SHIFT
@@ -1524,9 +1530,9 @@
.set noat
_MFC0 k0, MIPS_COP_0_BAD_VADDR # get the fault address
li k1, VM_MIN_KERNEL_ADDRESS # compute index
- subu k0, k0, k1
- lw k1, _C_LABEL(Sysmapsize) # index within range?
- srl k0, k0, PGSHIFT
+ PTR_SUBU k0, k0, k1
+ INT_L k1, _C_LABEL(Sysmapsize) # index within range?
+ PTR_SRL k0, k0, PGSHIFT
sltu k1, k0, k1
#ifdef newsmips
/* news5000 has ROM work area at 0xfff00000. */
@@ -1539,12 +1545,12 @@
beq k1, zero, outofworld # No. Failing beyond. . .
nop # - delay slot -
#endif
- lw k1, _C_LABEL(Sysmap)
- srl k0, k0, 1
- sll k0, k0, 3 # compute offset from index
- addu k1, k1, k0
- lw k0, 0(k1) # get PTE entry
- lw k1, 4(k1) # get odd PTE entry
+ PTR_L k1, _C_LABEL(Sysmap)
+ PTR_SRL k0, k0, 1
+ PTR_SLL k0, k0, 3 # compute offset from index
+ PTR_ADDU k1, k1, k0
+ INT_L k0, 0(k1) # get PTE entry
+ INT_L k1, 4(k1) # get odd PTE entry
_SLL k0, k0, WIRED_SHIFT # get rid of "wired" bit
_SRL k0, k0, WIRED_SHIFT
_MTC0 k0, MIPS_COP_0_TLB_LO0 # load PTE entry
@@ -1566,20 +1572,20 @@
outofworld:
/* eret to panic so shutdown can use K2. Try to ensure valid $sp. */
- la a0, _C_LABEL(panic)
+ PTR_LA a0, _C_LABEL(panic)
_MFC0 a2, MIPS_COP_0_EXC_PC
move a1, sp
- sll k0, k0, PGSHIFT
+ PTR_SLL k0, k0, PGSHIFT
_MTC0 a0, MIPS_COP_0_EXC_PC # return to panic
COP0_SYNC
li k1, VM_MIN_KERNEL_ADDRESS
- addu a3, k0, k1
+ PTR_ADDU a3, k0, k1
#if defined(DDB)
bltz sp, 1f # for ddb try to keep frame
nop
#endif
- la sp, start # set sp to a valid place
-1: la a0, 9f # string
+ PTR_LA sp, start # set sp to a valid place
+1: PTR_LA a0, 9f # string
eret
.set at
@@ -1855,25 +1861,25 @@
*/
LEAF_NOPROFILE(MIPSX(VCED))
.set noat
- mfc0 k0, MIPS_COP_0_BAD_VADDR # fault addr.
+ _MFC0 k0, MIPS_COP_0_BAD_VADDR # fault addr.
li k1, -16
and k0, k1
cache (CACHE_R4K_SD | CACHEOP_R4K_HIT_WB_INV), 0(k0)
cache (CACHE_R4K_D | CACHEOP_R4K_HIT_INV), 0(k0)
#ifdef DEBUG
- mfc0 k0, MIPS_COP_0_BAD_VADDR
- la k1, VCED_vaddr
- sw k0, 0(k1)
- mfc0 k0, MIPS_COP_0_EXC_PC
- la k1, VCED_epc
- sw k0, 0(k1)
- la k1, VCED_count # count number of exceptions
- srl k0, k0, 26 # position upper 4 bits of VA
+ _MFC0 k0, MIPS_COP_0_BAD_VADDR
+ PTR_LA k1, VCED_vaddr
+ PTR_S k0, 0(k1)
+ _MFC0 k0, MIPS_COP_0_EXC_PC
+ PTR_LA k1, VCED_epc
+ PTR_S k0, 0(k1)
+ PTR_LA k1, VCED_count # count number of exceptions
+ PTR_SRL k0, k0, 26 # position upper 4 bits of VA
and k0, k0, 0x3c # mask it off
add k1, k0 # get address of count table
- lw k0, 0(k1)
- addu k0, 1
- sw k0, 0(k1)
+ LONG_L k0, 0(k1)
+ LONG_ADDU k0, 1
+ LONG_S k0, 0(k1)
#endif
eret
.set at
@@ -1882,33 +1888,33 @@
.data
.globl _C_LABEL(VCED_count)
_C_LABEL(VCED_count):
- .word 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ LONG_WORD 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
.globl _C_LABEL(VCED_epc)
_C_LABEL(VCED_epc):
- .word 0
+ PTR_WORD 0
.globl _C_LABEL(VCED_vaddr)
_C_LABEL(VCED_vaddr):
- .word 0
+ PTR_WORD 0
.text
#endif
END(MIPSX(VCED))
LEAF_NOPROFILE(MIPSX(VCEI))
.set noat
- mfc0 k0, MIPS_COP_0_BAD_VADDR # fault addr.
+ _MFC0 k0, MIPS_COP_0_BAD_VADDR # fault addr.
cache (CACHE_R4K_SD | CACHEOP_R4K_HIT_WB_INV), 0(k0)
cache (CACHE_R4K_I | CACHEOP_R4K_HIT_INV), 0(k0)
#ifdef DEBUG
- mfc0 k0, MIPS_COP_0_BAD_VADDR
- la k1, VCEI_vaddr
- sw k0, 0(k1)
- la k1, VCEI_count # count number of exceptions
- srl k0, k0, 26 # position upper 4 bits of VA
+ _MFC0 k0, MIPS_COP_0_BAD_VADDR
+ PTR_LA k1, VCEI_vaddr
+ PTR_S k0, 0(k1)
+ PTR_LA k1, VCEI_count # count number of exceptions
+ PTR_SRL k0, k0, 26 # position upper 4 bits of VA
and k0, k0, 0x3c # mask it off
add k1, k0 # get address of count table
- lw k0, 0(k1)
+ LONG_L k0, 0(k1)
addu k0, 1
- sw k0, 0(k1)
+ LONG_S k0, 0(k1)
#endif
eret
.set at
@@ -1917,10 +1923,10 @@
.data
.globl _C_LABEL(VCEI_count)
_C_LABEL(VCEI_count):
- .word 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ LONG_WORD 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
.globl _C_LABEL(VCEI_vaddr)
_C_LABEL(VCEI_vaddr):
- .word 0
+ PTR_WORD 0
.text
#endif
END(MIPSX(VCEI))
@@ -1934,10 +1940,10 @@
* and s1 respectively. There is no need register save operation.
*/
LEAF(MIPSX(lwp_trampoline))
- addu sp, sp, -CALLFRAME_SIZ
+ PTR_ADDU sp, sp, -CALLFRAME_SIZ
# Call lwp_startup(), with args from cpu_switchto()/cpu_setfunc()
- la t0, _C_LABEL(lwp_startup)
+ PTR_LA t0, _C_LABEL(lwp_startup)
move a0, v0
jal ra, t0
move a1, s7
@@ -1966,7 +1972,7 @@
COP0_SYNC
nop
nop
- addu a1, sp, CALLFRAME_SIZ
+ PTR_ADDU a1, sp, CALLFRAME_SIZ
# REG_L a0, FRAME_SR(a1)
REG_L t0, FRAME_MULLO(a1)
REG_L t1, FRAME_MULHI(a1)
@@ -1979,8 +1985,8 @@
move k1, a1
#ifdef IPL_ICU_MASK
.set at
- lw t0, FRAME_PPL(k1)
- sw t0, _C_LABEL(md_imask)
+ INT_L t0, FRAME_PPL(k1)
+ INT_S t0, _C_LABEL(md_imask)
jal _C_LABEL(md_imask_update)
nop
.set noat
@@ -2028,7 +2034,7 @@
* Like lwp_trampoline, but do not call lwp_startup
*/
LEAF(MIPSX(setfunc_trampoline))
- addu sp, sp, -CALLFRAME_SIZ
+ PTR_ADDU sp, sp, -CALLFRAME_SIZ
# Call the routine specified by cpu_setfunc()
jal ra, s0
@@ -2048,9 +2054,10 @@
* sure TBIS(it) in the case.
*/
LEAF_NOPROFILE(MIPSX(cpu_switch_resume))
- lw a1, L_MD_UPTE_0(a0) # a1 = upte[0]
- lw a2, L_MD_UPTE_1(a0) # a2 = upte[1]
- lw v0, L_ADDR(a0) # va = l->l_addr
+#if !defined(ENABLE_MIPS_16KB_PAGE) || defined(VMSWAP_UAREA)
+ INT_L a1, L_MD_UPTE_0(a0) # a1 = upte[0]
+ INT_L a2, L_MD_UPTE_1(a0) # a2 = upte[1]
+ PTR_L v0, L_ADDR(a0) # va = l->l_addr
li s0, MIPS_KSEG2_START
blt v0, s0, resume
nop
@@ -2073,8 +2080,8 @@
mfc0 s0, MIPS_COP_0_TLB_INDEX
nop
bltz s0, entry0set
- sll s0, s0, 13 # PAGE_SHIFT + 1
- la s0, MIPS_KSEG0_START(s0)
+ sll s0, s0, PGSHIFT + 1 # PAGE_SHIFT + 1
+ PTR_LA s0, MIPS_KSEG0_START(s0)
_MTC0 s0, MIPS_COP_0_TLB_HI
COP0_SYNC
_MTC0 zero, MIPS_COP_0_TLB_LO0
@@ -2106,6 +2113,7 @@
nop
resume:
+#endif /* !ENABLE_MIPS_16KB_PAGE || VMSWAP_UAREA */
j ra
nop
END(MIPSX(cpu_switch_resume))
@@ -2137,7 +2145,7 @@
#nop # -slip-
bltz v0, 1f # index < 0 then skip
li t1, MIPS_KSEG0_START # invalid address
- sll v0, v0, 13 # PAGE_SHIFT + 1
+ sll v0, v0, PGSHIFT + 1 # PAGE_SHIFT + 1
addu t1, t1, v0
_MTC0 t1, MIPS_COP_0_TLB_HI # make entryHi invalid
COP0_SYNC
@@ -2145,10 +2153,15 @@
COP0_SYNC
_MTC0 zero, MIPS_COP_0_TLB_LO1 # zero out entryLo1
COP0_SYNC
+#if 1
+ nop
+#else
mtc0 zero, MIPS_COP_0_TLB_PG_MASK # zero out pageMask
+#endif
COP0_SYNC
nop
nop
+
tlbwi
COP0_SYNC
nop
@@ -2185,7 +2198,7 @@
1:
mtc0 t1, MIPS_COP_0_TLB_INDEX # set index
COP0_SYNC
- sll ta0, t1, 13 # PAGE_SHIFT + 1
+ sll ta0, t1, PGSHIFT + 1 # PAGE_SHIFT + 1
nop
/* XXX simonb: lose this nop for mips32/64? */
nop
@@ -2254,7 +2267,7 @@
1:
mtc0 t1, MIPS_COP_0_TLB_INDEX # set TLBindex
COP0_SYNC
- sll ta0, t1, 13 # PAGE_SHIFT + 1
+ sll ta0, t1, PGSHIFT + 1 # PAGE_SHIFT + 1
add ta0, v0, ta0
_MTC0 ta0, MIPS_COP_0_TLB_HI # make entryHi invalid
COP0_SYNC
@@ -2298,99 +2311,99 @@
END(MIPSX(pagezero))
#endif /* USE_64BIT_INSTRUCTIONS */
- .data
+ .rdata
.globl _C_LABEL(MIPSX(locoresw))
_C_LABEL(MIPSX(locoresw)):
- .word _C_LABEL(MIPSX(cpu_switch_resume))
- .word _C_LABEL(MIPSX(lwp_trampoline))
- .word _C_LABEL(nullop)
- .word _C_LABEL(MIPSX(setfunc_trampoline))
+ PTR_WORD _C_LABEL(MIPSX(cpu_switch_resume))
+ PTR_WORD _C_LABEL(MIPSX(lwp_trampoline))
+ PTR_WORD _C_LABEL(nullop)
+ PTR_WORD _C_LABEL(MIPSX(setfunc_trampoline))
MIPSX(excpt_sw):
####
#### The kernel exception handlers.
####
- .word _C_LABEL(MIPSX(KernIntr)) # 0 external interrupt
- .word _C_LABEL(MIPSX(KernGenException)) # 1 TLB modification
- .word _C_LABEL(MIPSX(TLBInvalidException))# 2 TLB miss (LW/I-fetch)
- .word _C_LABEL(MIPSX(TLBInvalidException))# 3 TLB miss (SW)
- .word _C_LABEL(MIPSX(KernGenException)) # 4 address error (LW/I-fetch)
- .word _C_LABEL(MIPSX(KernGenException)) # 5 address error (SW)
- .word _C_LABEL(MIPSX(KernGenException)) # 6 bus error (I-fetch)
- .word _C_LABEL(MIPSX(KernGenException)) # 7 bus error (load or store)
- .word _C_LABEL(MIPSX(KernGenException)) # 8 system call
- .word _C_LABEL(MIPSX(KernGenException)) # 9 breakpoint
- .word _C_LABEL(MIPSX(KernGenException)) # 10 reserved instruction
- .word _C_LABEL(MIPSX(KernGenException)) # 11 coprocessor unusable
- .word _C_LABEL(MIPSX(KernGenException)) # 12 arithmetic overflow
- .word _C_LABEL(MIPSX(KernGenException)) # 13 r4k trap exception
+ PTR_WORD _C_LABEL(MIPSX(KernIntr)) # 0 external interrupt
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 1 TLB modification
+ PTR_WORD _C_LABEL(MIPSX(TLBInvalidException))# 2 TLB miss (LW/I-fetch)
+ PTR_WORD _C_LABEL(MIPSX(TLBInvalidException))# 3 TLB miss (SW)
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 4 address error (LW/I-fetch)
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 5 address error (SW)
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 6 bus error (I-fetch)
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 7 bus error (load or store)
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 8 system call
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 9 breakpoint
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 10 reserved instruction
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 11 coprocessor unusable
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 12 arithmetic overflow
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 13 r4k trap exception
#if defined(MIPS3) && !defined(MIPS3_5900)
- .word _C_LABEL(mips3_VCEI) # 14 r4k virt coherence
+ PTR_WORD _C_LABEL(mips3_VCEI) # 14 r4k virt coherence
#else
- .word _C_LABEL(MIPSX(KernGenException)) # 14 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 14 reserved
#endif
- .word _C_LABEL(MIPSX(KernGenException)) # 15 r4k FP exception
- .word _C_LABEL(MIPSX(KernGenException)) # 16 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 17 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 18 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 19 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 20 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 21 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 22 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 23 watch exception
- .word _C_LABEL(MIPSX(KernGenException)) # 24 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 25 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 26 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 27 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 28 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 29 reserved
- .word _C_LABEL(MIPSX(KernGenException)) # 30 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 15 r4k FP exception
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 16 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 17 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 18 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 19 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 20 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 21 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 22 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 23 watch exception
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 24 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 25 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 26 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 27 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 28 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 29 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 30 reserved
#if defined(MIPS3) && !defined(MIPS3_5900)
- .word _C_LABEL(mips3_VCED) # 31 v. coherence exception data
+ PTR_WORD _C_LABEL(mips3_VCED) # 31 v. coherence exception data
#else
- .word _C_LABEL(MIPSX(KernGenException)) # 31 reserved
+ PTR_WORD _C_LABEL(MIPSX(KernGenException)) # 31 reserved
#endif
#####
##### The user exception handlers.
#####
- .word _C_LABEL(MIPSX(UserIntr)) # 0
- .word _C_LABEL(MIPSX(UserGenException)) # 1
- .word _C_LABEL(MIPSX(UserGenException)) # 2
- .word _C_LABEL(MIPSX(UserGenException)) # 3
- .word _C_LABEL(MIPSX(UserGenException)) # 4
- .word _C_LABEL(MIPSX(UserGenException)) # 5
- .word _C_LABEL(MIPSX(UserGenException)) # 6
- .word _C_LABEL(MIPSX(UserGenException)) # 7
- .word _C_LABEL(MIPSX(SystemCall)) # 8
- .word _C_LABEL(MIPSX(UserGenException)) # 9
- .word _C_LABEL(MIPSX(UserGenException)) # 10
- .word _C_LABEL(MIPSX(UserGenException)) # 11
- .word _C_LABEL(MIPSX(UserGenException)) # 12
- .word _C_LABEL(MIPSX(UserGenException)) # 13
+ PTR_WORD _C_LABEL(MIPSX(UserIntr)) # 0
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 1
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 2
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 3
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 4
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 5
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 6
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 7
+ PTR_WORD _C_LABEL(MIPSX(SystemCall)) # 8
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 9
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 10
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 11
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 12
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 13
#if defined(MIPS3) && !defined(MIPS3_5900)
- .word _C_LABEL(mips3_VCEI) # 14
+ PTR_WORD _C_LABEL(mips3_VCEI) # 14
#else
- .word _C_LABEL(MIPSX(UserGenException)) # 14
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 14
#endif
- .word _C_LABEL(MIPSX(UserGenException)) # 15
- .word _C_LABEL(MIPSX(UserGenException)) # 16
- .word _C_LABEL(MIPSX(UserGenException)) # 17
- .word _C_LABEL(MIPSX(UserGenException)) # 18
- .word _C_LABEL(MIPSX(UserGenException)) # 19
- .word _C_LABEL(MIPSX(UserGenException)) # 20
- .word _C_LABEL(MIPSX(UserGenException)) # 21
- .word _C_LABEL(MIPSX(UserGenException)) # 22
- .word _C_LABEL(MIPSX(UserGenException)) # 23
- .word _C_LABEL(MIPSX(UserGenException)) # 24
- .word _C_LABEL(MIPSX(UserGenException)) # 25
- .word _C_LABEL(MIPSX(UserGenException)) # 26
- .word _C_LABEL(MIPSX(UserGenException)) # 27
- .word _C_LABEL(MIPSX(UserGenException)) # 28
- .word _C_LABEL(MIPSX(UserGenException)) # 29
- .word _C_LABEL(MIPSX(UserGenException)) # 30
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 15
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 16
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 17
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 18
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 19
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 20
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 21
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 22
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 23
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 24
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 25
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 26
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 27
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 28
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 29
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 30
#if defined(MIPS3) && !defined(MIPS3_5900)
- .word _C_LABEL(mips3_VCED) # 31 v. coherence exception data
+ PTR_WORD _C_LABEL(mips3_VCED) # 31 v. coherence exception data
#else
- .word _C_LABEL(MIPSX(UserGenException)) # 31
+ PTR_WORD _C_LABEL(MIPSX(UserGenException)) # 31
#endif
Index: src/sys/arch/mips/mips/mips_mcclock_loop.S
diff -u src/sys/arch/mips/mips/mips_mcclock_loop.S:1.3 src/sys/arch/mips/mips/mips_mcclock_loop.S:1.3.18.1
--- src/sys/arch/mips/mips/mips_mcclock_loop.S:1.3 Mon Apr 28 20:23:28 2008
+++ src/sys/arch/mips/mips/mips_mcclock_loop.S Fri Aug 21 17:50:35 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_mcclock_loop.S,v 1.3 2008/04/28 20:23:28 martin Exp $ */
+/* $NetBSD: mips_mcclock_loop.S,v 1.3.18.1 2009/08/21 17:50:35 matt Exp $ */
/*
* Copyright (c) 2005 The NetBSD Foundation, Inc.
@@ -43,10 +43,10 @@
LEAF_NOPROFILE(mips_mcclock_loop_with_clock)
- subu sp, CALLFRAME_SIZ
- sw s0, 0(sp)
- sw ra, CALLFRAME_RA(sp)
- j 2f
+ PTR_SUBU sp, CALLFRAME_SIZ
+ REG_S s0, CALLFRAME_S0(sp)
+ REG_S ra, CALLFRAME_RA(sp)
+ j 2f
move s0, zero # iters = 0;
1:
.set push
@@ -57,24 +57,24 @@
ssnop
.set pop
- addu s0, 1 # iters++;
-2: jal mips_cp0_cause_read # v0 = mips_cp0_cause_read();
+ addu s0, 1 # iters++;
+2: jal mips_cp0_cause_read # v0 = mips_cp0_cause_read();
nop
- and v0, a0 # v0 &= clockmask;
- beqz v0, 1b # if zero then repeat
- move v0, s0 # return iters
- lw ra, CALLFRAME_RA(sp)
- lw s0, 0(sp)
- j ra
- addu sp, CALLFRAME_SIZ
+ and v0, a0 # v0 &= clockmask;
+ beqz v0, 1b # if zero then repeat
+ move v0, s0 # return iters
+ REG_L ra, CALLFRAME_RA(sp)
+ REG_S s0, CALLFRAME_S0(sp)
+ j ra
+ PTR_ADDU sp, CALLFRAME_SIZ
END(mips_mcclock_loop_with_clock)
LEAF_NOPROFILE(mips_mcclock_loop_without_clock)
- subu sp, CALLFRAME_SIZ
- sw s0, 0(sp)
- sw ra, CALLFRAME_RA(sp)
- j 2f
- move s0, zero # iters = 0;
+ PTR_SUBU sp, CALLFRAME_SIZ
+ REG_S s0, CALLFRAME_S0(sp)
+ REG_S ra, CALLFRAME_RA(sp)
+ j 2f
+ move s0, zero # iters = 0;
1:
.set push
.set mips32
@@ -82,14 +82,14 @@
ssnop
.set pop
- addu s0, 1 # iters++;
-2: jal mips_cp0_cause_read # v0 = mips_cp0_cause_read();
+ addu s0, 1 # iters++;
+2: jal mips_cp0_cause_read # v0 = mips_cp0_cause_read();
nop
- and v0, a0 # v0 &= clockmask;
- beqz v0, 1b # if zero then repeat
- move v0, s0 # return iters
- lw ra, CALLFRAME_RA(sp)
- lw s0, 0(sp)
- j ra
- addu sp, CALLFRAME_SIZ
+ and v0, a0 # v0 &= clockmask;
+ beqz v0, 1b # if zero then repeat
+ move v0, s0 # return iters
+ REG_L ra, CALLFRAME_RA(sp)
+ REG_L s0, CALLFRAME_S0(sp)
+ j ra
+ PTR_ADDU sp, CALLFRAME_SIZ
END(mips_mcclock_loop_without_clock)
