Module Name: src
Committed By: matt
Date: Sun Sep 6 22:36:16 UTC 2009
Modified Files:
src/sys/arch/mips/include [matt-nb5-mips64]: cpuregs.h
Log Message:
Add some more macros for XUSEG/XSSEK and for testing what segment an address
belongs to.
To generate a diff of this commit:
cvs rdiff -u -r1.74.28.5 -r1.74.28.6 src/sys/arch/mips/include/cpuregs.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/cpuregs.h
diff -u src/sys/arch/mips/include/cpuregs.h:1.74.28.5 src/sys/arch/mips/include/cpuregs.h:1.74.28.6
--- src/sys/arch/mips/include/cpuregs.h:1.74.28.5 Sat Sep 5 03:20:21 2009
+++ src/sys/arch/mips/include/cpuregs.h Sun Sep 6 22:36:16 2009
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuregs.h,v 1.74.28.5 2009/09/05 03:20:21 matt Exp $ */
+/* $NetBSD: cpuregs.h,v 1.74.28.6 2009/09/06 22:36:16 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -76,7 +76,13 @@
* Caching of mapped addresses is controlled by bits in the TLB entry.
*/
-#define MIPS_KUSEG_START 0x0L
+#ifdef _LP64
+#define MIPS_XUSEG_START (0L << 62)
+#define MIPS_XUSEG_P(x) (((uint64_t)(x) >> 62) == 0)
+#define MIPS_USEG_P(x) ((uintptr_t)(x) < 0x80000000L)
+#define MIPS_XSSEG_START (1L << 62)
+#define MIPS_XSSEG_P(x) (((uint64_t)(x) >> 62) == 1)
+#endif
/*
* MIPS addresses are signed and we defining as negative so that
@@ -97,9 +103,14 @@
#define MIPS_KSEG1_TO_PHYS(x) ((uintptr_t)(x) & MIPS_PHYS_MASK)
#define MIPS_PHYS_TO_KSEG1(x) ((uintptr_t)(x) | (intptr_t)MIPS_KSEG1_START)
+#define MIPS_KSEG0_P(x) (((uintptr_t)(x) & ~MIPS_PHYS_MASK) == MIPS_KSEG0_START)
+#define MIPS_KSEG1_P(x) (((uintptr_t)(x) & ~MIPS_PHYS_MASK) == MIPS_KSEG1_START)
+#define MIPS_KSEG2_P(x) ((uintptr_t)MIPS_KSEG2_START <= (uintptr_t)(x))
+
/* Map virtual address to index in mips3 r4k virtually-indexed cache */
#define MIPS3_VA_TO_CINDEX(x) \
(((intptr_t)(x) & 0xffffff) | MIPS_KSEG0_START)
+
#define MIPS_XSEG_MASK (0x3fffffffffffffffLL)
#define MIPS_XKSEG_START (0x3ULL << 62)
#define MIPS_XKSEG_P(x) (((uint64_t)(x) >> 62) == 3)
@@ -108,8 +119,12 @@
#define MIPS_PHYS_TO_XKPHYS(cca,x) \
(MIPS_XKPHYS_START | ((uint64_t)(cca) << 59) | (x))
#define MIPS_XKPHYS_TO_PHYS(x) ((x) & 0x0effffffffffffffLL)
+#define MIPS_XKPHYS_TO_CCA(x) (((x) >> 59) & 7)
#define MIPS_XKPHYS_P(x) (((uint64_t)(x) >> 62) == 2)
+#define CCA_UNCACHED 2
+#define CCA_CACHEABLE 3 /* cacheable non-coherent */
+
/* CPU dependent mtc0 hazard hook */
#define COP0_SYNC /* nothing */
#define COP0_HAZARD_FPUENABLE nop; nop; nop; nop;
