Module Name: src
Committed By: skrll
Date: Sun Aug 12 17:16:18 UTC 2018
Modified Files:
src/sys/arch/aarch64/include: armreg.h
Log Message:
Whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/aarch64/include/armreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/include/armreg.h
diff -u src/sys/arch/aarch64/include/armreg.h:1.16 src/sys/arch/aarch64/include/armreg.h:1.17
--- src/sys/arch/aarch64/include/armreg.h:1.16 Thu Aug 9 10:27:17 2018
+++ src/sys/arch/aarch64/include/armreg.h Sun Aug 12 17:16:18 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.16 2018/08/09 10:27:17 jmcneill Exp $ */
+/* $NetBSD: armreg.h,v 1.17 2018/08/12 17:16:18 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -929,7 +929,6 @@ AARCH64REG_WRITE_INLINE(cntvct_el0)
#define CNTCTL_IMASK __BIT(1) // Timer Interrupt is Masked
#define CNTCTL_ENABLE __BIT(0) // Timer Enabled
-
// ID_AA64PFR0_EL1: AArch64 Processor Feature Register 0
#define ID_AA64PFR0_EL1_GIC __BITS(24,27) // GIC CPU IF
#define ID_AA64PFR0_EL1_GIC_SHIFT 24
@@ -1088,7 +1087,6 @@ static __inline void
gtmr_cntp_ctl_write(uint32_t val)
{
-
reg_cntp_ctl_el0_write(val);
}
