Module Name:    src
Committed By:   skrll
Date:           Tue Sep  4 15:50:25 UTC 2018

Modified Files:
        src/sys/arch/aarch64/aarch64: locore.S

Log Message:
Adjust register usage a bit and unbreak DEBUG_MMU as a result.

The change moves to using callee-saved registers more so that any call
into C will have them preserved (if they're used or not).  It's safe
to use stack as it's setup very early for BP/APs.

Discussed with ryo@


To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/aarch64/aarch64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.21 src/sys/arch/aarch64/aarch64/locore.S:1.22
--- src/sys/arch/aarch64/aarch64/locore.S:1.21	Thu Aug 30 10:38:01 2018
+++ src/sys/arch/aarch64/aarch64/locore.S	Tue Sep  4 15:50:25 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.21 2018/08/30 10:38:01 maxv Exp $	*/
+/*	$NetBSD: locore.S,v 1.22 2018/09/04 15:50:25 skrll Exp $	*/
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <[email protected]>
@@ -35,7 +35,7 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.21 2018/08/30 10:38:01 maxv Exp $")
+RCSID("$NetBSD: locore.S,v 1.22 2018/09/04 15:50:25 skrll Exp $")
 
 /* #define DEBUG_LOCORE */
 /* #define DEBUG_MMU */
@@ -496,22 +496,25 @@ END(aarch64_mpstart)
  *    .ascii    "Hello\r\n\0" <- wouldn't return here
  *    .align    2
  *    nop                     <- return to here
+ *
+ * x0 is preserved despite being caller saved.
  */
 ENTRY_NP(xprint)
-	mov	x11, lr
-	mov	x12, x0
-	ldrb	w0, [x11], #1
+	stp	x0, x19, [sp, #-16]!
+
+	mov	x19, lr
+	ldrb	w0, [x19], #1
 	cbz	w0, 2f
 
 1:
 	bl	uartputc
-	ldrb	w0, [x11], #1
+	ldrb	w0, [x19], #1
 	cbnz	w0, 1b
 
 2:
-	add	x11, x11, #3
-	bic	lr, x11, #3
-	mov	x0, x12
+	add	x19, x19, #3
+	bic	lr, x19, #3
+	ldp	x0, x19, [sp], #16
 	ret
 END(xprint)
 
@@ -527,47 +530,52 @@ ENTRY_NP(uartputs)
 	ret
 END(uartputs)
 
+/* x0 is preserved despite being caller saved. */
 ENTRY_NP(_print_x0)
 	stp	x0, lr, [sp, #-16]!
-	stp	x4, x5, [sp, #-16]!
-	stp	x6, x7, [sp, #-16]!
+	stp	x20, x21, [sp, #-16]!
 
-	mov	x7, x0		/* number to display */
-	mov	x4, #60		/* num of shift */
-	mov	x5, #0xf	/* mask */
+	mov	x21, x0		/* number to display */
+	mov	x20, #60	/* num of shift */
 1:
-	ror	x0, x7, x4
-	and	x0, x0, x5
+	ror	x0, x21, x20
+	and	x0, x0, #0xf
 	cmp	x0, #10
 	blt	2f
 	add	x0, x0, #('a' - 10 - '0')
 2:	add	x0, x0, #'0'
 	bl	uartputc
-	subs	x4, x4, #4
+	subs	x20, x20, #4
 	bge	1b
 
-	ldp	x6, x7, [sp], #16
-	ldp	x4, x5, [sp], #16
+	ldp	x20, x21, [sp], #16
 	ldp	x0, lr, [sp], #16
 	ret
 END(_print_x0)
 
+/* Preserve x{0,1,2} descpite them being caller saved */
 ENTRY_NP(print_x0)
 	stp	x0, lr, [sp, #-16]!
+	stp	x1, x2, [sp, #-16]!
 	bl	_print_x0
 	PRINT("\r\n")
+	ldp	x1, x2, [sp], #16
 	ldp	x0, lr, [sp], #16
 	ret
 END(print_x0)
 
+/* Preserve x{0,1,2} descpite them being caller saved */
 ENTRY_NP(printn_x1)
 	stp	x0, lr, [sp, #-16]!
+	stp	x1, x2, [sp, #-16]!
 	mov	x0, x1
 	bl	_print_x0
+	ldp	x1, x2, [sp], #16
 	ldp	x0, lr, [sp], #16
 	ret
 END(printn_x1)
 
+/* Preserve x{0,1,2} descpite them being caller saved */
 ENTRY_NP(print_x2)
 	stp	x0, lr, [sp, #-16]!
 	mov	x0, x2
@@ -772,32 +780,42 @@ END(l0_settable)
  */
 ENTRY_NP(l1_setblocks)
 	stp	x0, lr, [sp, #-16]!
+	stp	x19, x20, [sp, #-16]!
+	stp	x21, x22, [sp, #-16]!
 
-	and	x2, x2, #L1_ADDR_BITS
-	mov	x8, #L1_BLOCK
-	orr	x2, x2, x8
-	orr	x2, x2, x3
-	mov	x8, #(LX_BLKPAG_AF|LX_BLKPAG_AP_RW)
-	orr	x2, x2, x8
+	mov	x19, x0			/* l1table */
+	mov	x22, x4			/* N entries */
+
+	and	x21, x2, #L1_ADDR_BITS	/* PA[38:30] */
+	mov	x9, #L1_BLOCK
+	orr	x21, x21, x9
+	orr	x21, x21, x3		/* add in attr */
+	mov	x9, #(LX_BLKPAG_AF|LX_BLKPAG_AP_RW)
+	orr	x21, x21, x9
 #ifdef MULTIPROCESSOR
-	orr	x2, x2, #LX_BLKPAG_SH_IS
+	orr	x21, x21, #LX_BLKPAG_SH_IS
 #endif
-	and	x1, x1, #L1_ADDR_BITS
-	lsr	x1, x1, #L1_SHIFT
+	and	x20, x1, #L1_ADDR_BITS	/* VA[38:30] */
+	lsr	x20, x20, #L1_SHIFT
 1:
-	str	x2, [x0, x1, lsl #3]	/* l1table[x1] = x2 */
+	str	x21, [x19, x20, lsl #3]	/* l1table[x20] = x21 */
+
 #ifdef DEBUG_MMU
 	PRINT("L1 entry[")
-	bl printn_x1
+	mov	x1, x19
+	bl	printn_x1
 	PRINT("]=")
-	bl print_x2
+	mov	x2, x21
+	bl	print_x2
 #endif
-	mov	x3, #L1_SIZE
-	add	x2, x2, x3
-	add	x1, x1, #1
-	subs	x4, x4, #1
+	mov	x9, #L1_SIZE
+	add	x21, x21, x9
+	add	x20, x20, #1
+	subs	x22, x22, #1
 	bne	1b
 
+	ldp	x21, x22, [sp], #16
+	ldp	x19, x20, [sp], #16
 	ldp	x0, lr, [sp], #16
 	ret
 END(l1_setblocks)
@@ -837,32 +855,42 @@ END(l1_settable)
  */
 ENTRY_NP(l2_setblocks)
 	stp	x0, lr, [sp, #-16]!
+	stp	x19, x20, [sp, #-16]!
+	stp	x21, x22, [sp, #-16]!
 
-	and	x2, x2, #L2_BLOCK_MASK
-	mov	x8, #L2_BLOCK
-	orr	x2, x2, x8
-	orr	x2, x2, x3
-	mov	x8, #(LX_BLKPAG_AF|LX_BLKPAG_AP_RW)
-	orr	x2, x2, x8
+	mov	x19, x0			/* l1table */
+	mov	x22, x4			/* N entries */
+
+	and	x21, x2, #L2_BLOCK_MASK
+	mov	x9, #L2_BLOCK
+	orr	x21, x21, x9
+	orr	x21, x21, x3		/* Add attr bits */
+	mov	x9, #(LX_BLKPAG_AF|LX_BLKPAG_AP_RW)
+	orr	x21, x21, x9
 #ifdef MULTIPROCESSOR
-	orr	x2, x2, #LX_BLKPAG_SH_IS
+	orr	x21, x21, #LX_BLKPAG_SH_IS
 #endif
-	and	x1, x1, #L2_ADDR_BITS
-	lsr	x1, x1, #L2_SHIFT
+	and	x20, x1, #L2_ADDR_BITS
+	lsr	x20, x20, #L2_SHIFT
 1:
-	str	x2, [x0, x1, lsl #3]	/* l2table[x1] = x2 */
+	str	x21, [x19, x20, lsl #3]	/* l2table[x20] = x21 */
+
 #ifdef DEBUG_MMU
 	PRINT("L2 entry[")
-	bl printn_x1
+	mov	x1, x19
+	bl	printn_x1
 	PRINT("]=")
-	bl print_x2
+	mov	x2, x21
+	bl	print_x2
 #endif
-	mov	x3, #L2_SIZE
-	add	x2, x2, x3
-	add	x1, x1, #1
-	subs	x4, x4, #1
+	mov	x9, #L2_SIZE
+	add	x21, x21, x9
+	add	x20, x20, #1
+	subs	x22, x22, #1
 	bne	1b
 
+	ldp	x21, x22, [sp], #16
+	ldp	x19, x20, [sp], #16
 	ldp	x0, lr, [sp], #16
 	ret
 END(l2_setblocks)

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