Module Name: src
Committed By: jmcneill
Date: Mon Sep 10 09:48:57 UTC 2018
Modified Files:
src/sys/arch/arm/cortex: gic.c
Log Message:
Update sc_mptargets atomically, as PEs will be started up in parallel w/o
locking here
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/cortex/gic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gic.c
diff -u src/sys/arch/arm/cortex/gic.c:1.35 src/sys/arch/arm/cortex/gic.c:1.36
--- src/sys/arch/arm/cortex/gic.c:1.35 Sun Jul 15 16:04:07 2018
+++ src/sys/arch/arm/cortex/gic.c Mon Sep 10 09:48:57 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: gic.c,v 1.35 2018/07/15 16:04:07 jmcneill Exp $ */
+/* $NetBSD: gic.c,v 1.36 2018/09/10 09:48:57 jmcneill Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -34,7 +34,7 @@
#define _INTR_PRIVATE
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.35 2018/07/15 16:04:07 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.36 2018/09/10 09:48:57 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -43,6 +43,7 @@ __KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.35
#include <sys/evcnt.h>
#include <sys/intr.h>
#include <sys/proc.h>
+#include <sys/atomic.h>
#include <arm/armreg.h>
#include <arm/atomic.h>
@@ -514,7 +515,7 @@ armgic_cpu_init(struct pic_softc *pic, s
{
struct armgic_softc * const sc = PICTOSOFTC(pic);
sc->sc_target[cpu_index(ci)] = gicd_find_targets(sc);
- sc->sc_mptargets |= sc->sc_target[cpu_index(ci)];
+ atomic_or_32(&sc->sc_mptargets, sc->sc_target[cpu_index(ci)]);
KASSERTMSG(ci->ci_cpl == IPL_HIGH, "ipl %d not IPL_HIGH", ci->ci_cpl);
armgic_cpu_init_priorities(sc);
if (!CPU_IS_PRIMARY(ci)) {
