Module Name: src Committed By: msaitoh Date: Wed Sep 12 07:42:22 UTC 2018
Modified Files: src/sys/dev/pci: pci_subr.c pcireg.h Log Message: Add ATS Relaxed Ordering supported bit described in Address Translation Relaxed Ordering ECN. To generate a diff of this commit: cvs rdiff -u -r1.202 -r1.203 src/sys/dev/pci/pci_subr.c cvs rdiff -u -r1.139 -r1.140 src/sys/dev/pci/pcireg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/dev/pci/pci_subr.c diff -u src/sys/dev/pci/pci_subr.c:1.202 src/sys/dev/pci/pci_subr.c:1.203 --- src/sys/dev/pci/pci_subr.c:1.202 Tue Jul 3 04:56:59 2018 +++ src/sys/dev/pci/pci_subr.c Wed Sep 12 07:42:22 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: pci_subr.c,v 1.202 2018/07/03 04:56:59 msaitoh Exp $ */ +/* $NetBSD: pci_subr.c,v 1.203 2018/09/12 07:42:22 msaitoh Exp $ */ /* * Copyright (c) 1997 Zubin D. Dittia. All rights reserved. @@ -40,7 +40,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.202 2018/07/03 04:56:59 msaitoh Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.203 2018/09/12 07:42:22 msaitoh Exp $"); #ifdef _KERNEL_OPT #include "opt_pci.h" @@ -3152,6 +3152,7 @@ pci_conf_print_ats_cap(const pcireg_t *r printf(" Invalidate Queue Depth: %u\n", num); onoff("Page Aligned Request", reg, PCI_ATS_CAP_PALIGNREQ); onoff("Global Invalidate", reg, PCI_ATS_CAP_GLOBALINVL); + onoff("Relaxed Ordering", reg, PCI_ATS_CAP_RELAXORD); printf(" Control register: 0x%04x\n", ctl); printf(" Smallest Translation Unit: %u\n", Index: src/sys/dev/pci/pcireg.h diff -u src/sys/dev/pci/pcireg.h:1.139 src/sys/dev/pci/pcireg.h:1.140 --- src/sys/dev/pci/pcireg.h:1.139 Mon Jul 2 03:52:32 2018 +++ src/sys/dev/pci/pcireg.h Wed Sep 12 07:42:21 2018 @@ -1,4 +1,4 @@ -/* $NetBSD: pcireg.h,v 1.139 2018/07/02 03:52:32 msaitoh Exp $ */ +/* $NetBSD: pcireg.h,v 1.140 2018/09/12 07:42:21 msaitoh Exp $ */ /* * Copyright (c) 1995, 1996, 1999, 2000 @@ -1770,6 +1770,7 @@ struct pci_rom { #define PCI_ATS_CAP_INVQDEPTH __BITS(4, 0) /* Invalidate Queue Depth */ #define PCI_ATS_CAP_PALIGNREQ __BIT(5) /* Page Aligned Request */ #define PCI_ATS_CAP_GLOBALINVL __BIT(6) /* Global Invalidate Support */ +#define PCI_ATS_CAP_RELAXORD __BIT(7) /* Relaxed Ordering */ #define PCI_ATS_CTL 0x04 /* Control Register */ #define PCI_ATS_CTL_STU __BITS(20, 16) /* Smallest Translation Unit */ #define PCI_ATS_CTL_EN __BIT(31) /* Enable */