Module Name: src
Committed By: ryo
Date: Thu Oct 4 09:09:29 UTC 2018
Modified Files:
src/sys/arch/aarch64/aarch64: genassym.cf locore.S pmap.c
src/sys/arch/aarch64/include: pmap.h pte.h
Log Message:
* define LX_BLKPAG_{OS,ATTR}_* for OS dependent PTE attributes in pmap.h
* cleanup macros
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/aarch64/aarch64/genassym.cf
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/aarch64/aarch64/pmap.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/aarch64/include/pmap.h
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/aarch64/include/pte.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/genassym.cf
diff -u src/sys/arch/aarch64/aarch64/genassym.cf:1.7 src/sys/arch/aarch64/aarch64/genassym.cf:1.8
--- src/sys/arch/aarch64/aarch64/genassym.cf:1.7 Sun Aug 26 18:15:49 2018
+++ src/sys/arch/aarch64/aarch64/genassym.cf Thu Oct 4 09:09:29 2018
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.7 2018/08/26 18:15:49 ryo Exp $
+# $NetBSD: genassym.cf,v 1.8 2018/10/04 09:09:29 ryo Exp $
#-
# Copyright (c) 2014 The NetBSD Foundation, Inc.
# All rights reserved.
@@ -68,6 +68,7 @@ define MAXCPUS MAXCPUS
define VM_MIN_KERNEL_ADDRESS VM_MIN_KERNEL_ADDRESS
define VM_MAX_KERNEL_ADDRESS VM_MAX_KERNEL_ADDRESS
define VM_KERNEL_IO_ADDRESS VM_KERNEL_IO_ADDRESS
+define VM_KERNEL_IO_SIZE VM_KERNEL_IO_SIZE
define AARCH64_KSEG_START AARCH64_KSEG_START
define UPAGES UPAGES
define USPACE (UPAGES * PAGE_SIZE)
@@ -124,10 +125,10 @@ define LX_BLKPAG_AP LX_BLKPAG_AP
define LX_BLKPAG_AP_RO LX_BLKPAG_AP_RO
define LX_BLKPAG_AP_RW LX_BLKPAG_AP_RW
define LX_BLKPAG_SH_IS LX_BLKPAG_SH_IS
-define LX_BLKPAG_ATTR_INDX_0 LX_BLKPAG_ATTR_INDX_0
-define LX_BLKPAG_ATTR_INDX_1 LX_BLKPAG_ATTR_INDX_1
-define LX_BLKPAG_ATTR_INDX_2 LX_BLKPAG_ATTR_INDX_2
-define LX_BLKPAG_ATTR_INDX_3 LX_BLKPAG_ATTR_INDX_3
+define LX_BLKPAG_ATTR_NORMAL_WB LX_BLKPAG_ATTR_NORMAL_WB
+define LX_BLKPAG_ATTR_NORMAL_NC LX_BLKPAG_ATTR_NORMAL_NC
+define LX_BLKPAG_ATTR_NORMAL_WT LX_BLKPAG_ATTR_NORMAL_WT
+define LX_BLKPAG_ATTR_DEVICE_MEM LX_BLKPAG_ATTR_DEVICE_MEM
define Ln_ENTRIES Ln_ENTRIES
define TCR_AS64K TCR_AS64K
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.26 src/sys/arch/aarch64/aarch64/locore.S:1.27
--- src/sys/arch/aarch64/aarch64/locore.S:1.26 Mon Oct 1 19:45:00 2018
+++ src/sys/arch/aarch64/aarch64/locore.S Thu Oct 4 09:09:29 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.26 2018/10/01 19:45:00 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.27 2018/10/04 09:09:29 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <[email protected]>
@@ -35,7 +35,7 @@
#include <aarch64/hypervisor.h>
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.26 2018/10/01 19:45:00 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.27 2018/10/04 09:09:29 ryo Exp $")
/* #define DEBUG_LOCORE */
/* #define DEBUG_MMU */
@@ -46,12 +46,6 @@ RCSID("$NetBSD: locore.S,v 1.26 2018/10/
#define LOCORE_EL2
-/* attributes are defined in MAIR_EL1 */
-#define L2_BLKPAG_ATTR_NORMAL_WB LX_BLKPAG_ATTR_INDX_0
-#define L2_BLKPAG_ATTR_NORMAL_NC LX_BLKPAG_ATTR_INDX_1
-#define L2_BLKPAG_ATTR_NORMAL_WT LX_BLKPAG_ATTR_INDX_2
-#define L2_BLKPAG_ATTR_DEVICE_MEM LX_BLKPAG_ATTR_INDX_3
-
#define PRINT(string) bl xprint;.asciz string;.align 2
#ifdef VERBOSE_LOCORE
@@ -629,7 +623,7 @@ ENTRY_NP(arm_boot_l0pt_init)
ADDR x0, ttbr0_l1table
mov x1, #0 /* VA */
mov x2, #0 /* PA */
- mov x3, #L2_BLKPAG_ATTR_DEVICE_MEM
+ mov x3, #LX_BLKPAG_ATTR_DEVICE_MEM
mov x4, #4 /* 4GB = whole 32bit */
bl l1_setblocks
@@ -645,7 +639,7 @@ ENTRY_NP(arm_boot_l0pt_init)
ADDR x0, ttbr1_l1table_kseg
mov x1, #AARCH64_KSEG_START
mov x2, #0
- mov x3, #L2_BLKPAG_ATTR_NORMAL_WB
+ mov x3, #LX_BLKPAG_ATTR_NORMAL_WB
orr x3, x3, #(LX_BLKPAG_PXN|LX_BLKPAG_UXN)
mov x4, #Ln_ENTRIES /* whole l1 table */
bl l1_setblocks
@@ -669,7 +663,7 @@ ENTRY_NP(arm_boot_l0pt_init)
adr x2, start /* physical addr. before MMU */
and x2, x2, #L2_BLK_OA /* L2 block size aligned (2MB) */
mov x1, #VM_MIN_KERNEL_ADDRESS
- mov x3, #(L2_BLKPAG_ATTR_NORMAL_WB|LX_BLKPAG_UXN)
+ mov x3, #(LX_BLKPAG_ATTR_NORMAL_WB|LX_BLKPAG_UXN)
/* kernelsize = _end - start */
ldr x1, =start
Index: src/sys/arch/aarch64/aarch64/pmap.c
diff -u src/sys/arch/aarch64/aarch64/pmap.c:1.24 src/sys/arch/aarch64/aarch64/pmap.c:1.25
--- src/sys/arch/aarch64/aarch64/pmap.c:1.24 Mon Sep 17 00:15:55 2018
+++ src/sys/arch/aarch64/aarch64/pmap.c Thu Oct 4 09:09:29 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.24 2018/09/17 00:15:55 ryo Exp $ */
+/* $NetBSD: pmap.c,v 1.25 2018/10/04 09:09:29 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <[email protected]>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.24 2018/09/17 00:15:55 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.25 2018/10/04 09:09:29 ryo Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -142,19 +142,6 @@ PMAP_COUNTER(unwire_failure, "pmap_unwir
#define PMAP_COUNT(name) __nothing
#endif /* PMAPCOUNTERS */
-/* saved permission bit for referenced/modified emulation */
-#define LX_BLKPAG_OS_READ LX_BLKPAG_OS_0
-#define LX_BLKPAG_OS_WRITE LX_BLKPAG_OS_1
-#define LX_BLKPAG_OS_WIRED LX_BLKPAG_OS_2
-#define LX_BLKPAG_OS_RWMASK (LX_BLKPAG_OS_WRITE|LX_BLKPAG_OS_READ)
-
-/* memory attributes are configured MAIR_EL1 in locore */
-#define LX_BLKPAG_ATTR_NORMAL_WB __SHIFTIN(0, LX_BLKPAG_ATTR_INDX)
-#define LX_BLKPAG_ATTR_NORMAL_NC __SHIFTIN(1, LX_BLKPAG_ATTR_INDX)
-#define LX_BLKPAG_ATTR_NORMAL_WT __SHIFTIN(2, LX_BLKPAG_ATTR_INDX)
-#define LX_BLKPAG_ATTR_DEVICE_MEM __SHIFTIN(3, LX_BLKPAG_ATTR_INDX)
-#define LX_BLKPAG_ATTR_MASK LX_BLKPAG_ATTR_INDX
-
/*
* invalidate TLB entry for ASID and VA.
* `ll' invalidates only the Last Level (usually L3) of TLB entry
Index: src/sys/arch/aarch64/include/pmap.h
diff -u src/sys/arch/aarch64/include/pmap.h:1.10 src/sys/arch/aarch64/include/pmap.h:1.11
--- src/sys/arch/aarch64/include/pmap.h:1.10 Sat Sep 15 19:47:48 2018
+++ src/sys/arch/aarch64/include/pmap.h Thu Oct 4 09:09:29 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.10 2018/09/15 19:47:48 jakllsch Exp $ */
+/* $NetBSD: pmap.h,v 1.11 2018/10/04 09:09:29 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -78,6 +78,21 @@ struct vm_page_md {
(pg)->mdpage.mdpg_flags = 0; \
} while (/*CONSTCOND*/ 0)
+
+/* saved permission bit for referenced/modified emulation */
+#define LX_BLKPAG_OS_READ LX_BLKPAG_OS_0
+#define LX_BLKPAG_OS_WRITE LX_BLKPAG_OS_1
+#define LX_BLKPAG_OS_WIRED LX_BLKPAG_OS_2
+#define LX_BLKPAG_OS_BOOT LX_BLKPAG_OS_3
+#define LX_BLKPAG_OS_RWMASK (LX_BLKPAG_OS_WRITE|LX_BLKPAG_OS_READ)
+
+/* memory attributes are configured MAIR_EL1 in locore */
+#define LX_BLKPAG_ATTR_NORMAL_WB __SHIFTIN(0, LX_BLKPAG_ATTR_INDX)
+#define LX_BLKPAG_ATTR_NORMAL_NC __SHIFTIN(1, LX_BLKPAG_ATTR_INDX)
+#define LX_BLKPAG_ATTR_NORMAL_WT __SHIFTIN(2, LX_BLKPAG_ATTR_INDX)
+#define LX_BLKPAG_ATTR_DEVICE_MEM __SHIFTIN(3, LX_BLKPAG_ATTR_INDX)
+#define LX_BLKPAG_ATTR_MASK LX_BLKPAG_ATTR_INDX
+
#define l0pde_pa(pde) ((paddr_t)((pde) & LX_TBL_PA))
#define l0pde_index(v) (((vaddr_t)(v) & L0_ADDR_BITS) >> L0_SHIFT)
#define l0pde_valid(pde) (((pde) & LX_VALID) == LX_VALID)
@@ -138,9 +153,14 @@ paddr_t pmap_devmap_vtophys(paddr_t);
pd_entry_t *pmap_alloc_pdp(struct pmap *, paddr_t *);
+#define L1_TRUNC_BLOCK(x) ((x) & L1_FRAME)
+#define L1_ROUND_BLOCK(x) L1_TRUNC_BLOCK((x) + L1_SIZE - 1)
+#define L2_TRUNC_BLOCK(x) ((x) & L2_FRAME)
+#define L2_ROUND_BLOCK(x) L2_TRUNC_BLOCK((x) + L2_SIZE - 1)
+
/* devmap use L2 blocks. (2Mbyte) */
-#define DEVMAP_TRUNC_ADDR(x) ((x) & ~L2_OFFSET)
-#define DEVMAP_ROUND_SIZE(x) (((x) + L2_SIZE - 1) & ~(L2_SIZE - 1))
+#define DEVMAP_TRUNC_ADDR(x) L2_TRUNC_BLOCK((x))
+#define DEVMAP_ROUND_SIZE(x) L2_ROUND_BLOCK((x))
#define DEVMAP_ENTRY(va, pa, sz) \
{ \
Index: src/sys/arch/aarch64/include/pte.h
diff -u src/sys/arch/aarch64/include/pte.h:1.4 src/sys/arch/aarch64/include/pte.h:1.5
--- src/sys/arch/aarch64/include/pte.h:1.4 Tue Jul 17 10:01:59 2018
+++ src/sys/arch/aarch64/include/pte.h Thu Oct 4 09:09:29 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: pte.h,v 1.4 2018/07/17 10:01:59 ryo Exp $ */
+/* $NetBSD: pte.h,v 1.5 2018/10/04 09:09:29 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -186,6 +186,8 @@ typedef uint64_t pt_entry_t; /* L3(4k) t
#define TTBR_ASID __BITS(63,48)
#define TTBR_BADDR __BITS(47,0)
+#define TTBR_SEL_VA __BIT(63) /* which TTBR is selected */
+
#elif defined(__arm__)
